On Sun, Sep 27, 2026 at 5:07 AM Richard Henderson <[email protected]> wrote: > > Signed-off-by: Richard Henderson <[email protected]> > --- > include/tcg/tcg-op-common.h | 2 -- > include/tcg/tcg-op-def.h.inc | 1 + > tcg/tcg-op.c | 51 +++++++++++++----------------------- > 3 files changed, 19 insertions(+), 35 deletions(-) > > diff --git a/include/tcg/tcg-op-common.h b/include/tcg/tcg-op-common.h > index d5915ecc1bb..ed503462a2e 100644 > --- a/include/tcg/tcg-op-common.h > +++ b/include/tcg/tcg-op-common.h > @@ -135,7 +135,6 @@ void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned > meminfo); > void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 > arg2); > void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg); > void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg); > -void tcg_gen_revbit8_i32(TCGv_i32 ret, TCGv_i32 arg); > void tcg_gen_revbit32_i32(TCGv_i32 ret, TCGv_i32 arg); > > /* Replicate a value of size @vece from @in to all the lanes in @out */ > @@ -161,7 +160,6 @@ void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, > unsigned flags); > void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg); > void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg); > void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg); > -void tcg_gen_revbit8_i64(TCGv_i64 ret, TCGv_i64 arg); > void tcg_gen_revbit32_i64(TCGv_i64 ret, TCGv_i64 arg, unsigned flags); > void tcg_gen_revbit64_i64(TCGv_i64 ret, TCGv_i64 arg); > > diff --git a/include/tcg/tcg-op-def.h.inc b/include/tcg/tcg-op-def.h.inc > index 2ebcf4a0665..ab1bf259296 100644 > --- a/include/tcg/tcg-op-def.h.inc > +++ b/include/tcg/tcg-op-def.h.inc > @@ -49,6 +49,7 @@ DEF3(ori, TCGV, TCGV, TINT) > DEF3(orc, TCGV, TCGV, TCGV) > DEF3(rem, TCGV, TCGV, TCGV) > DEF3(remu, TCGV, TCGV, TCGV) > +DEF2(revbit8, TCGV, TCGV) > DEF3(rotl, TCGV, TCGV, TCGV) > DEF3(rotli, TCGV, TCGV, TINT) > DEF3(rotr, TCGV, TCGV, TCGV) > diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c > index 0c6146cfbe6..17f323b1b72 100644 > --- a/tcg/tcg-op.c > +++ b/tcg/tcg-op.c > @@ -119,11 +119,6 @@ static TCGOp * DNI tcg_gen_op1i(TCGOpcode opc, TCGType > type, TCGArg a1) > return tcg_gen_op1(opc, type, a1); > } > > -static void DNI tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2) > -{ > - tcg_gen_op2(opc, TCG_TYPE_I32, tcgv_i32_arg(a1), tcgv_i32_arg(a2)); > -} > - > static void DNI tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2) > { > tcg_gen_op2(opc, TCG_TYPE_I64, tcgv_i64_arg(a1), tcgv_i64_arg(a2)); > @@ -1016,6 +1011,24 @@ void tcg_gen_remu(TCGType type, TCGTemp *dst, TCGTemp > *src1, TCGTemp *src2) > } > } > > +void tcg_gen_revbit8(TCGType type, TCGTemp *dst, TCGTemp *src) > +{ > + static const TCGOpcode revw[2] = { INDEX_op_revbit32, INDEX_op_revbit64 > }; > + static const TCGOpcode bswapw[2] = { INDEX_op_bswap32, INDEX_op_bswap64 > }; > + > + if (tcg_op_supported(INDEX_op_revbit8, type, 0)) { > + tcg_gen_op_tt(INDEX_op_revbit8, type, dst, src); > + } else if (tcg_op_supported(revw[type], type, 0) && > + tcg_op_supported(bswapw[type], type, 0)) { > + tcg_gen_op_tt(revw[type], type, dst, src); > + tcg_gen_op_tti(bswapw[type], type, dst, dst, 0); > + } else { > + tcg_gen_bitswap(type, dst, src, 0x5555555555555555ull); > + tcg_gen_bitswap(type, dst, dst, 0x3333333333333333ull); > + tcg_gen_bitswap(type, dst, dst, 0x0f0f0f0f0f0f0f0full);
When called with type=I32, src2 won't be in the canonical (i.e. sign-extended) form.
