On 2026/10/01 2:18, Philippe Mathieu-Daudé wrote:
Cc'ing Akihiko who worked on gdbstub.
On 11/9/26 14:27, Marc-André Lureau wrote:
Hi,
HMP monitor supports printing $register expression. The lookup
was done via GDB stub registers, and supplementary MonitorDef
HMP-specific tables.
Migrate HMP registers to use the GDB infrastructure and remove the
legacy HMP MonitorDef. Use a "qemu-debug" register group, as they are
aliases or synthetic registers, but gdb doesn't seem to care.
Unfortunately, these aliases and synthetic registers appear to have
several problems:
- GDB already provides writable pseudo-registers for SPARC64's asi and
pstate. The new QEMU registers shadow them but ignore writes, breaking
previously supported functionality. See:
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gdb/sparc64-tdep.c;h=93db3417a2a9f64790acab33288eb05764112e0b;hb=6a5e5259790e5a854ddbb69eb486b9245fcfeee8#l976
- GDB caches each raw register independently. Updating one alias can
leave another stale, causing incorrect reads or skipped writes.
- The new raw aliases do not inherit the original registers' unwind
rules, leading to incorrect register values when selecting older
call frames.
The latter two issues also affect the RISC-V aliases and cannot be
resolved merely by changing QEMU's register read/write callbacks. I
therefore think we need to retain HMP-specific handling for these aliases.
Regards,
Akihiko Odaki
Known behavioural changes on RISC-V: CSR lookup is now case-sensitive
and vector registers now report "unkown register" instead of a
target-specific message ("Unable to print the value of vector vreg 'v0'
from this API")
Signed-off-by: Marc-André Lureau <[email protected]>
---
Marc-André Lureau (10):
hmp: don't crash on invalid register
gdbstub: fix next register base after register gaps
gdbstub: set feature->base_reg for dynamic features
target/i386: expose segment limits via GDB
monitor/hmp: add CPUClass::get_pc fallback for HMP $pc
target/m68k: expose system registers via GDB
target/sparc64: expose system registers via GDB
target/riscv: bypass smstateen check in debugger mode
target/riscv: expose register aliases via GDB
monitor/hmp: remove legacy MonitorDef infrastructure
configs/targets/i386-softmmu.mak | 2 +-
configs/targets/m68k-softmmu.mak | 2 +-
configs/targets/riscv32-linux-user.mak | 2 +-
configs/targets/riscv32-softmmu.mak | 2 +-
configs/targets/riscv64-bsd-user.mak | 2 +-
configs/targets/riscv64-linux-user.mak | 2 +-
configs/targets/riscv64-softmmu.mak | 2 +-
configs/targets/sparc64-softmmu.mak | 2 +-
configs/targets/x86_64-softmmu.mak | 2 +-
gdbstub/gdb-xml/i386-segments.xml | 14 +++
gdbstub/gdb-xml/m68k-system.xml | 32 +++++++
gdbstub/gdb-xml/riscv-32bit-alias.xml | 105 ++++++++++++++++++++++
gdbstub/gdb-xml/riscv-32bit-fpu-alias.xml | 40 +++++++++
gdbstub/gdb-xml/riscv-64bit-alias.xml | 105 ++++++++++++++++++++++
gdbstub/gdb-xml/riscv-64bit-fpu-alias.xml | 46 ++++++++++
gdbstub/gdb-xml/sparc64-system.xml | 22 +++++
gdbstub/gdbstub.c | 14 +--
include/hw/core/cpu.h | 2 +-
include/hw/core/sysemu-cpu-ops.h | 16 ----
include/monitor/hmp.h | 6 --
include/qemu/typedefs.h | 1 -
monitor/hmp.c | 52 ++---------
target/arm/gdbstub.c | 8 +-
target/arm/gdbstub64.c | 10 ++-
target/i386/cpu.c | 32 -------
target/i386/gdbstub.c | 24 +++++
target/m68k/cpu.c | 22 -----
target/m68k/helper.c | 47 ++++++++++
target/ppc/gdbstub.c | 2 +-
target/riscv/cpu.c | 1 -
target/riscv/gdbstub.c | 52 ++++++++++-
target/riscv/internals.h | 3 -
target/riscv/monitor.c | 140
------------------------------
target/riscv/tcg/csr.c | 3 +-
target/sparc/cpu.c | 19 ----
target/sparc/gdbstub.c | 38 ++++++++
target/xtensa/cpu.c | 2 +-
37 files changed, 562 insertions(+), 314 deletions(-)
---
base-commit: 209b2afaface001c7d4d981e38f186afe7b24a50
change-id: 20260910-query-reg-80cd59cf4707
Best regards,
--
Marc-André Lureau <[email protected]>
