Re: [PATCH v2 04/21] target/microblaze: prefix helper conflicting with other arch

Thu, 01 Oct 2026 08:55:20 -0700 

On 1/10/26 13:41, Yonggang Luo wrote:

Hi Pierrick
I have prepared:

Subject: [PATCH v2 4/6] tcg: namespace target helper symbols for combined builds
at
https://lore.kernel.org/qemu-devel/[email protected]/

to deal with these issues in a generic way.


Thanks for proposing a generic way to rename helpers! Let's see
what Richard (the maintainer of this area) think about it first.



The idea is comes from Philippe at

https://lore.kernel.org/qemu-devel/[email protected]/

That would help us to avoid these renames. do not have to be such way,
but it's a option.

On Wed, Sep 30, 2026 at 10:04 AM Pierrick Bouvier
<[email protected]> wrote:


Signed-off-by: Pierrick Bouvier <[email protected]>
---
  target/microblaze/helper.h    | 10 +++++-----
  target/microblaze/op_helper.c | 10 +++++-----
  target/microblaze/translate.c | 10 +++++-----
  3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h
index 1429c1727ef..63a94ac4bbc 100644
--- a/target/microblaze/helper.h
+++ b/target/microblaze/helper.h
@@ -1,15 +1,15 @@
-DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32)
+DEF_HELPER_FLAGS_2(microblaze_raise_exception, TCG_CALL_NO_WG, noreturn, env, 
i32)

  DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32)
  DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32)

-DEF_HELPER_FLAGS_3(fadd, TCG_CALL_NO_WG, i32, env, i32, i32)
+DEF_HELPER_FLAGS_3(microblaze_fadd, TCG_CALL_NO_WG, i32, env, i32, i32)
  DEF_HELPER_FLAGS_3(frsub, TCG_CALL_NO_WG, i32, env, i32, i32)
-DEF_HELPER_FLAGS_3(fmul, TCG_CALL_NO_WG, i32, env, i32, i32)
-DEF_HELPER_FLAGS_3(fdiv, TCG_CALL_NO_WG, i32, env, i32, i32)
+DEF_HELPER_FLAGS_3(microblaze_fmul, TCG_CALL_NO_WG, i32, env, i32, i32)
+DEF_HELPER_FLAGS_3(microblaze_fdiv, TCG_CALL_NO_WG, i32, env, i32, i32)
  DEF_HELPER_FLAGS_2(flt, TCG_CALL_NO_WG, i32, env, i32)
  DEF_HELPER_FLAGS_2(fint, TCG_CALL_NO_WG, i32, env, i32)
-DEF_HELPER_FLAGS_2(fsqrt, TCG_CALL_NO_WG, i32, env, i32)
+DEF_HELPER_FLAGS_2(microblaze_fsqrt, TCG_CALL_NO_WG, i32, env, i32)

  DEF_HELPER_FLAGS_3(fcmp_un, TCG_CALL_NO_WG, i32, env, i32, i32)
  DEF_HELPER_FLAGS_3(fcmp_lt, TCG_CALL_NO_WG, i32, env, i32, i32)
diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c
index 3da0c68da39..c169312e954 100644
--- a/target/microblaze/op_helper.c
+++ b/target/microblaze/op_helper.c
@@ -62,7 +62,7 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl)
      return 0xdead0000 | id;
  }

-void helper_raise_exception(CPUMBState *env, uint32_t index)
+void helper_microblaze_raise_exception(CPUMBState *env, uint32_t index)
  {
      CPUState *cs = env_cpu(env);

@@ -154,7 +154,7 @@ static void update_fpu_flags(CPUMBState *env, int flags, 
uintptr_t ra)
      }
  }

-uint32_t helper_fadd(CPUMBState *env, uint32_t a, uint32_t b)
+uint32_t helper_microblaze_fadd(CPUMBState *env, uint32_t a, uint32_t b)
  {
      CPU_FloatU fd, fa, fb;
      int flags;
@@ -183,7 +183,7 @@ uint32_t helper_frsub(CPUMBState *env, uint32_t a, uint32_t 
b)
      return fd.l;
  }

-uint32_t helper_fmul(CPUMBState *env, uint32_t a, uint32_t b)
+uint32_t helper_microblaze_fmul(CPUMBState *env, uint32_t a, uint32_t b)
  {
      CPU_FloatU fd, fa, fb;
      int flags;
@@ -198,7 +198,7 @@ uint32_t helper_fmul(CPUMBState *env, uint32_t a, uint32_t 
b)
      return fd.l;
  }

-uint32_t helper_fdiv(CPUMBState *env, uint32_t a, uint32_t b)
+uint32_t helper_microblaze_fdiv(CPUMBState *env, uint32_t a, uint32_t b)
  {
      CPU_FloatU fd, fa, fb;
      int flags;
@@ -352,7 +352,7 @@ uint32_t helper_fint(CPUMBState *env, uint32_t a)
      return r;
  }

-uint32_t helper_fsqrt(CPUMBState *env, uint32_t a)
+uint32_t helper_microblaze_fsqrt(CPUMBState *env, uint32_t a)
  {
      CPU_FloatU fd, fa;
      int flags;
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 8b219afb5dd..16794059a22 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -100,7 +100,7 @@ static void t_sync_flags(DisasContext *dc)

  static void gen_raise_exception(DisasContext *dc, uint32_t index)
  {
-    gen_helper_raise_exception(tcg_env, tcg_constant_i32(index));
+    gen_helper_microblaze_raise_exception(tcg_env, tcg_constant_i32(index));
      dc->base.is_jmp = DISAS_NORETURN;
  }

@@ -421,10 +421,10 @@ static void gen_cmpu(TCGv_i32 out, TCGv_i32 ina, TCGv_i32 
inb)
  DO_TYPEA(cmp, false, gen_cmp)
  DO_TYPEA(cmpu, false, gen_cmpu)

-ENV_WRAPPER3(gen_fadd, gen_helper_fadd)
+ENV_WRAPPER3(gen_fadd, gen_helper_microblaze_fadd)
  ENV_WRAPPER3(gen_frsub, gen_helper_frsub)
-ENV_WRAPPER3(gen_fmul, gen_helper_fmul)
-ENV_WRAPPER3(gen_fdiv, gen_helper_fdiv)
+ENV_WRAPPER3(gen_fmul, gen_helper_microblaze_fmul)
+ENV_WRAPPER3(gen_fdiv, gen_helper_microblaze_fdiv)
  ENV_WRAPPER3(gen_fcmp_un, gen_helper_fcmp_un)
  ENV_WRAPPER3(gen_fcmp_lt, gen_helper_fcmp_lt)
  ENV_WRAPPER3(gen_fcmp_eq, gen_helper_fcmp_eq)
@@ -447,7 +447,7 @@ DO_TYPEA_CFG(fcmp_ge, use_fpu, true, gen_fcmp_ge)

  ENV_WRAPPER2(gen_flt, gen_helper_flt)
  ENV_WRAPPER2(gen_fint, gen_helper_fint)
-ENV_WRAPPER2(gen_fsqrt, gen_helper_fsqrt)
+ENV_WRAPPER2(gen_fsqrt, gen_helper_microblaze_fsqrt)

  DO_TYPEA0_CFG(flt, use_fpu >= 2, true, gen_flt)
  DO_TYPEA0_CFG(fint, use_fpu >= 2, true, gen_fint)
--
2.43.0

Reply via email to