Hi Peter, On Tue, 06 Oct 2026 12:24:17 +0100, Peter Maydell <[email protected]> wrote: [...] > > /* > > - * With a 52-bit OA (FEAT_LPA or FEAT_LPA2), bits [51:48] of descaddr > > are > > - * in [5:2] of TTBR, and bits [5:0] of the base address are zero: a > > table > > - * under 64 bytes is still 64-byte aligned (R_KBLCR). > > + * With a 52-bit OA, or with TCR.DS, bits [51:48] of the base address > > are > > + * in [5:2] of TTBR, and bits [5:0] of the base address are zero: the > > + * table is at least 64-byte aligned. > > You put that R_KBLCR reference into this comment in patch 1, so > why are you deleting it again in patch 2?
I'll keep it in v2. > > * > > - * Otherwise, if the base address is out of range, raise > > AddressSizeFault. > > - * In the pseudocode, this is !IsZero(baseregister<47:outputsize>), > > - * but we've just cleared the bits above 47, so simplify the test. > > + * If the base address is out of range, raise AddressSizeFault, as > > + * AArch64_OAOutOfRange() does in the pseudocode. > > Please don't drop information that's still relevant. This comment is > remarking that although the pseudocode is doing an IsZero check only > on the bits of the address between the max physaddr size and the > outputsize, QEMU is doing a check on all the upper bits, and saying > why that's OK. This is still the case, although the pseudocode has > changed a little so AArch64_OAOutOfRange()'s test is now: > return !IsZero(address[NUM_PABITS-1:oasize]); > (and NUM_PABITS is 56). I'll put it back in v2, updated to the current pseudocode. v2 will also have the test in its own patch, after the two fixes. Cheers, /fuad
