Add kvm_idreg_write_scratch_vcpu helper that will be used by qmp_query_cpu_model_expansion code to test SYSREG settings against a scratch vcpu. Indeed when the expansion code is called the actual vcpu has not been initialized so we use a scratch vcpu. This latter has been initialized with features taken from legacy compositive options (EL2, SVE, ...). So the trial is very close to the final setup.
Signed-off-by: Eric Auger <[email protected]> --- target/arm/kvm_arm.h | 4 ++++ target/arm/kvm-stub.c | 7 +++++++ target/arm/kvm.c | 21 +++++++++++++++++++++ target/arm/trace-events | 1 + 4 files changed, 33 insertions(+) diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index e7c40fb003..25a1dec095 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -14,6 +14,7 @@ #include "qapi/qapi-types-misc-arm.h" #include "system/kvm.h" #include "target/arm/cpu-qom.h" +#include "cpu-idregs.h" #define KVM_ARM_VGIC_V2 (1 << 0) #define KVM_ARM_VGIC_V3 (1 << 1) @@ -240,4 +241,7 @@ void arm_gic_cap_kvm_probe(GICCapability *v2, GICCapability *v3); */ char *kvm_print_register_name(uint64_t regidx); +bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd, + ARM64SysRegField *field, uint64_t newfv, + Error **errp); #endif diff --git a/target/arm/kvm-stub.c b/target/arm/kvm-stub.c index 88cbe8d85c..8e6fae0a4d 100644 --- a/target/arm/kvm-stub.c +++ b/target/arm/kvm-stub.c @@ -119,3 +119,10 @@ char *kvm_print_register_name(uint64_t regidx) { g_assert_not_reached(); } + +bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd, + ARM64SysRegField *field, uint64_t newfv, + Error **errp) +{ + g_assert_not_reached(); +} diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 0c7e80aea8..82ffcac7e3 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -1297,6 +1297,27 @@ static int kvm_arm_apply_one_sysreg_prop(ARMCPU *cpu, ARM64SysRegField *field, return kvm_arm_override_idreg_field(CPU(cpu)->kvm_fd, field, newfv, errp); } +bool kvm_idreg_write_scratch_vcpu(ARMCPU *cpu, int cpufd, + ARM64SysRegField *field, uint64_t newfv, + Error **errp) +{ + int ret; + + if (!arm_cpu_validate_sysreg_prop(cpu, field, newfv, errp)) { + return false; + } + + ret = kvm_arm_override_idreg_field(cpufd, field, newfv, errp); + if (ret) { + return false; + } + + cpu->isar.idregs[field->index] = + deposit64(cpu->isar.idregs[field->index], + field->shift, field->length, newfv); + return true; +} + static int kvm_arm_apply_sysreg_props(ARMCPU *cpu, Error **errp) { return arm_cpu_apply_sysreg_props(cpu, kvm_arm_apply_one_sysreg_prop, errp); diff --git a/target/arm/trace-events b/target/arm/trace-events index 81564f1d96..a731b5d4ba 100644 --- a/target/arm/trace-events +++ b/target/arm/trace-events @@ -15,6 +15,7 @@ arm_gt_update_irq(int timer, int irqstate) "gt_update_irq: timer %d irqstate %d" kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64" is translated into 0x%"PRIx64 get_host_cpu_idregs(const char *name, uint64_t value) "scratch vcpu host value for %s is 0x%"PRIx64 kvm_arm_override_idreg_field(const char *reg_name, const char *field_name, uint64_t currentfv, uint64_t newfv) "%s.%s current=0x%"PRIx64" new=0x%"PRIx64 +kvm_arm_idreg_write_scratch_vcpu(const char *name, uint64_t oldfv, uint64_t newfv, uint64_t actualfv) "successful dry-run for %s old=0x%"PRIx64" new=0x%"PRIx64" actual=0x%"PRIx64 # cpu.c arm_cpu_reset(uint64_t mp_aff) "cpu %" PRIu64 -- 2.53.0
