This ensures the guests can discover the AMD cache and processor topology leaves when TOPOEXT feature is enabled.
Signed-off-by: Doru Blânzeanu <[email protected]> --- target/i386/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 74eebeabd7..f1d8a35766 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -9879,6 +9879,11 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp) x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); } + /* TOPOEXT requires CPUID[0x8000001D] and CPUID[0x8000001E] */ + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_TOPOEXT) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001E); + } + /* SEV requires CPUID[0x8000001F] */ if (sev_enabled()) { x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F); -- 2.53.0
