With PTW enabled, hardware accesses page table entry with physical address, which equals to MMU_DA_IDX mode, even if current CPU runs in PAGE enabled. Here use input parameter mmu_idx rather than checking current CPU running mode.
Signed-off-by: Bibo Mao <[email protected]> --- target/loongarch/cpu_helper.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/loongarch/cpu_helper.c b/target/loongarch/cpu_helper.c index 123cad3d93..8a4f8ebc4d 100644 --- a/target/loongarch/cpu_helper.c +++ b/target/loongarch/cpu_helper.c @@ -319,13 +319,11 @@ TLBRet get_physical_address(CPULoongArchState *env, MMUContext *context, uint32_t plv, base_c, base_v; int64_t addr_high; CPUSysState *sys = env_sys(env); - uint8_t da = FIELD_EX64(sys->CSR_CRMD, CSR_CRMD, DA); - uint8_t pg = FIELD_EX64(sys->CSR_CRMD, CSR_CRMD, PG); vaddr address; /* Check PG and DA */ address = context->addr; - if (da & !pg) { + if (mmu_idx == MMU_DA_IDX) { context->physical = address & loongarch_palen_mask(env); context->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; context->mmu_index = MMU_DA_IDX; -- 2.54.0
