If LVZ is supported in the future, there will be a two-level page table
walk. This patch replaces address_space_ldq_le with the cpu_ldq_le_xxx API
for page table entry loading. The latter API uses the QEMU CPU TLB and
automatically triggers the second-level page table walk. It can also
generate a page fault exception if the second-level page table walk fails.
Bibo Mao (3):
target/loongarch: Replace address_space_ldq_le() ->
cpu_ldq_le_data_ra()
target/loongarch: Use input parameter mmu_idx rather than current mode
target/loongarch: Replace address_space_ldq_le -> cpu_ldq_le_mmuidx_ra
in loongarch_ptw
target/loongarch/cpu_helper.c | 64 +++++++------------------------
target/loongarch/tcg/tlb_helper.c | 8 +---
2 files changed, 16 insertions(+), 56 deletions(-)
base-commit: 615ece3c406b262996e569f29ea6eed0d81c4d8d
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2.54.0
