Mark scalar and pair reads of *PCYCLE* regs as I/O so icount synchronizes
before reading.

Cover the read paths of {U,G}{PCYCLE,TIMER}{LO,HI,} registers.

Reviewed-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
---
 target/hexagon/gen_tcg_sys.h |  8 ++++++--
 target/hexagon/genptr.c      | 30 ++++++++++++++++++++++++++----
 target/hexagon/hex_common.py |  8 ++++----
 3 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h
index c9f6b41a877..413ccc97f7b 100644
--- a/target/hexagon/gen_tcg_sys.h
+++ b/target/hexagon/gen_tcg_sys.h
@@ -84,10 +84,14 @@
     } while (0)
 
 #define fGEN_TCG_Y2_resume(SHORTCODE) \
-    gen_helper_resume(tcg_env, RsV)
+    do { \
+        gen_helper_resume(tcg_env, RsV); \
+    } while (0)
 
 #define fGEN_TCG_Y2_start(SHORTCODE) \
-    gen_helper_start(tcg_env, RsV)
+    do { \
+        gen_helper_start(tcg_env, RsV); \
+    } while (0)
 
 #define fGEN_TCG_Y2_stop(SHORTCODE) \
     do { \
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index e19b9c359b3..1a68d8c1b8d 100644
--- a/target/hexagon/genptr.c
+++ b/target/hexagon/genptr.c
@@ -297,6 +297,9 @@ static void gen_log_sreg_write(DisasContext *ctx, int rnum, 
TCGv_i32 val)
 {
     uint32_t reg_mask = sreg_immut_masks[rnum];
 
+    if (rnum == HEX_SREG_MODECTL || rnum == HEX_SREG_SYSCFG) {
+        translator_io_start(&ctx->base);
+    }
     if (rnum == HEX_SREG_IMASK &&
         ctx->hex_def->hex_version < HEX_VER_V81) {
         reg_mask = 0xffff0000;
@@ -331,8 +334,12 @@ static void gen_log_sreg_write_pair(DisasContext *ctx, int 
rnum, TCGv_i64 val)
 }
 
 G_GNUC_UNUSED
-static void gen_read_sreg(TCGv_i32 dst, int reg_num)
+static void gen_read_sreg(DisasContext *ctx, TCGv_i32 dst, int reg_num)
 {
+    if (reg_num == HEX_SREG_TIMERLO || reg_num == HEX_SREG_TIMERHI ||
+        reg_num == HEX_SREG_PCYCLELO || reg_num == HEX_SREG_PCYCLEHI) {
+        translator_io_start(&ctx->base);
+    }
     if (reg_num >= HEX_SREG_GLB_START || reg_num == HEX_SREG_BADVA) {
         gen_helper_sreg_read(dst, tcg_env, tcg_constant_i32(reg_num));
     } else {
@@ -341,8 +348,11 @@ static void gen_read_sreg(TCGv_i32 dst, int reg_num)
 }
 
 G_GNUC_UNUSED
-static void gen_read_sreg_pair(TCGv_i64 dst, int reg_num)
+static void gen_read_sreg_pair(DisasContext *ctx, TCGv_i64 dst, int reg_num)
 {
+    if (reg_num == HEX_SREG_TIMERLO || reg_num == HEX_SREG_PCYCLELO) {
+        translator_io_start(&ctx->base);
+    }
     if (reg_num < HEX_SREG_GLB_START) {
         if (reg_num + 1 == HEX_SREG_BADVA) {
             TCGv_i32 badva = tcg_temp_new_i32();
@@ -359,8 +369,11 @@ static void gen_read_sreg_pair(TCGv_i64 dst, int reg_num)
 }
 
 G_GNUC_UNUSED
-static void gen_read_greg(TCGv_i32 dst, int reg_num)
+static void gen_read_greg(DisasContext *ctx, TCGv_i32 dst, int reg_num)
 {
+    if (reg_num == HEX_GREG_GPCYCLELO || reg_num == HEX_GREG_GPCYCLEHI) {
+        translator_io_start(&ctx->base);
+    }
     if (reg_num <= HEX_GREG_G3) {
         tcg_gen_mov_i32(dst, hex_greg[reg_num]);
     } else {
@@ -369,8 +382,11 @@ static void gen_read_greg(TCGv_i32 dst, int reg_num)
 }
 
 G_GNUC_UNUSED
-static void gen_read_greg_pair(TCGv_i64 dst, int reg_num)
+static void gen_read_greg_pair(DisasContext *ctx, TCGv_i64 dst, int reg_num)
 {
+    if (reg_num == HEX_GREG_GPCYCLELO) {
+        translator_io_start(&ctx->base);
+    }
     if (reg_num == HEX_GREG_G0 || reg_num == HEX_GREG_G2) {
         tcg_gen_concat_i32_i64(dst, hex_greg[reg_num],
                                     hex_greg[reg_num + 1]);
@@ -438,15 +454,19 @@ static inline void gen_read_ctrl_reg(DisasContext *ctx, 
const int reg_num,
                         ctx->num_hvx_insns);
 #ifndef CONFIG_USER_ONLY
     } else if (reg_num == HEX_REG_UTIMERLO) {
+        translator_io_start(&ctx->base);
         gen_helper_sreg_read(dest, tcg_env,
                              tcg_constant_i32(HEX_SREG_TIMERLO));
     } else if (reg_num == HEX_REG_UTIMERHI) {
+        translator_io_start(&ctx->base);
         gen_helper_sreg_read(dest, tcg_env,
                              tcg_constant_i32(HEX_SREG_TIMERHI));
     } else if (reg_num == HEX_REG_UPCYCLELO) {
+        translator_io_start(&ctx->base);
         gen_helper_upcycle_read(dest, tcg_env,
                                 tcg_constant_i32(HEX_SREG_PCYCLELO));
     } else if (reg_num == HEX_REG_UPCYCLEHI) {
+        translator_io_start(&ctx->base);
         gen_helper_upcycle_read(dest, tcg_env,
                                 tcg_constant_i32(HEX_SREG_PCYCLEHI));
 #else
@@ -489,12 +509,14 @@ static inline void gen_read_ctrl_reg_pair(DisasContext 
*ctx, const int reg_num,
         tcg_gen_concat_i32_i64(dest, hvx_cnt, hex_gpr[reg_num + 1]);
 #ifndef CONFIG_USER_ONLY
     } else if (reg_num == HEX_REG_UTIMERLO) {
+        translator_io_start(&ctx->base);
         TCGv lo = tcg_temp_new();
         TCGv hi = tcg_temp_new();
         gen_helper_sreg_read(lo, tcg_env, tcg_constant_i32(HEX_SREG_TIMERLO));
         gen_helper_sreg_read(hi, tcg_env, tcg_constant_i32(HEX_SREG_TIMERHI));
         tcg_gen_concat_i32_i64(dest, lo, hi);
     } else if (reg_num == HEX_REG_UPCYCLELO) {
+        translator_io_start(&ctx->base);
         gen_helper_upcycle_read_pair(dest, tcg_env);
 #else
     } else if (reg_num == HEX_REG_UTIMERLO) {
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index 9d4650f52fb..94e70b8657d 100755
--- a/target/hexagon/hex_common.py
+++ b/target/hexagon/hex_common.py
@@ -1244,7 +1244,7 @@ def decl_tcg(self, f, tag, regno):
         self.gen_check_impl(f, regno)
         f.write(code_fmt(f"""\
             TCGv_i32 {self.reg_tcg()} = tcg_temp_new_i32();
-            gen_read_greg({self.reg_tcg()}, {self.reg_num});
+            gen_read_greg(ctx, {self.reg_tcg()}, {self.reg_num});
         """))
     def analyze_read(self, f, regno):
         pass
@@ -1275,7 +1275,7 @@ def decl_tcg(self, f, tag, regno):
         self.gen_check_impl(f, regno)
         f.write(code_fmt(f"""\
             TCGv_i64 {self.reg_tcg()} = tcg_temp_new_i64();
-            gen_read_greg_pair({self.reg_tcg()}, {self.reg_num});
+            gen_read_greg_pair(ctx, {self.reg_tcg()}, {self.reg_num});
         """))
     def analyze_read(self, f, regno):
         pass
@@ -1304,7 +1304,7 @@ def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
             TCGv_i32 {self.reg_tcg()} = tcg_temp_new_i32();
-            gen_read_sreg({self.reg_tcg()}, {self.reg_num});
+            gen_read_sreg(ctx, {self.reg_tcg()}, {self.reg_num});
         """))
     def analyze_read(self, f, regno):
         pass
@@ -1333,7 +1333,7 @@ def decl_tcg(self, f, tag, regno):
         self.decl_reg_num(f, regno)
         f.write(code_fmt(f"""\
             TCGv_i64 {self.reg_tcg()} = tcg_temp_new_i64();
-            gen_read_sreg_pair({self.reg_tcg()}, {self.reg_num});
+            gen_read_sreg_pair(ctx, {self.reg_tcg()}, {self.reg_num});
         """))
     def analyze_read(self, f, regno):
         pass
-- 
2.34.1

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