On 15.10.2026 13:51, Richard Henderson wrote:
From: Dominic P <[email protected]>fold_shift computes s_mask for a rotate by a constant by rotating the input s_mask. The result is not a sign mask. For TCG_TYPE_I32, fold_masks_zosa_int then ORs in INT32_MIN, which can make it look like one: after sextract_i32 x,0,8 (s_mask ...ffffff80), rotr_i32 by 1 gives 0x7fffffc0, which becomes ...ffffffc0. A following sextract_i32 0,8 is then folded to a mov. rotl_i32 by 31 fails the same way. ARM, qemu-arm exits 255 instead of 7 (correct with -one-insn-per-tb): ldr r1, [r2] @ *r2 == 3 sxtb r1, r1 ror r1, r1, #1 sxtb r1, r1 @ dropped cmp r1, #0 movle r0, #255 movgt r0, #7 i386, the same with rotl_i32: movsbl %al, %eax roll $31, %eax movsbl %al, %eax # dropped Handle rotates like the logical right shift and let fold_masks_zo recompute s_mask from z_mask and o_mask. Cc: [email protected] Fixes: 93a967fbb57 ("tcg/optimize: Propagate sign info for shifting") Signed-off-by: Dominic P <[email protected]> Signed-off-by: Richard Henderson <[email protected]> Message-ID: <[email protected]>
Hi! I back-ported this change to 10.0.x stable/lts series, - this version lacks a few changes which are in older releases, such as merging of various _i32 & _i64 operands, also 03329e3ce460 "tcg/optimize: Build and use o_bits in fold_shift" is missing. And previous change in this area, 77ad6491326b4d "tcg/optimize: Fix s_mask computation for shifts", also had to be adjusted for 10.0.x. Please take a (quick?) look at the two commits at https://gitlab.com/mjt0k/qemu/-/commits/71ceb9311bf43afa6da0f46677755d29e4646fb5 which are this commit d228536a5142cd and the test, - whenever everything looks correct for 10.0.x Thanks! /mjt
