On 10/19/2026 8:35 AM, Brian Cain wrote: > The midpoint rounding thresholds shift by "shift - 3", which Coverity flagged > as potential undefined behavior. > > The legacy add and multiply paths select exp such that the normalized result > is at most one bit above it. With the largest legacy fraction width of 23 > bits, > shift is at least 41. We can safely assert this here. >
I'm not sure how to interpret this part. If the absolute minimum of shift it 41, then assert could be >= 41 directly? > Link: > https://lore.kernel.org/qemu-devel/cafeaca_wj-pycfiiu44utqidoc58_9ky3ued-9g14npgdpt...@mail.gmail.com/ > Fixes: 2633da1e127f ("target/hexagon: add the QFloat logic") > Resolves: Coverity CID 1688240 > Signed-off-by: Brian Cain <[email protected]> > --- > target/hexagon/mmvec/hvx_qfloat.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/target/hexagon/mmvec/hvx_qfloat.c > b/target/hexagon/mmvec/hvx_qfloat.c > index 41cc827aa87..afbcb114ca0 100644 > --- a/target/hexagon/mmvec/hvx_qfloat.c > +++ b/target/hexagon/mmvec/hvx_qfloat.c > @@ -721,6 +721,11 @@ static int64_t legacy_round_n(FloatParts64 parts, int > exp, int frac, int adj, > } > > if (midpoint) { > + /* > + * The legacy add/multiply result is at most one bit above exp, > + * making shift at least 41. > + */ > + g_assert(shift >= 3); > threshold = UINT64_C(3) << (shift - 3); > if (low <= threshold) { > return base + 1;
