On 10/18/2026 10:52 PM, Brian Cain wrote: > Firmware brings a Hexagon DSP's clocks up by programming a PLL and polling > its lock-detect. Then it asks the RCG to switch to the new clock. > > Signed-off-by: Brian Cain <[email protected]> > --- > MAINTAINERS | 2 + > include/hw/misc/qcom-qdsp6ss-clk.h | 15 +++ > hw/misc/qcom-qdsp6ss-clk.c | 208 +++++++++++++++++++++++++++++ > hw/misc/Kconfig | 3 + > hw/misc/meson.build | 3 + > 5 files changed, 231 insertions(+) > create mode 100644 include/hw/misc/qcom-qdsp6ss-clk.h > create mode 100644 hw/misc/qcom-qdsp6ss-clk.c >
Reviewed-by: Pierrick Bouvier <[email protected]>
