From: Nicolas Pitre <[email protected]> Add boolean property for CBQRI and imply it should be enabled for the RISC-V virt machine. Build the CBQRI controllers when RISC-V CBQRI is enabled.
Signed-off-by: Nicolas Pitre <[email protected]> Signed-off-by: Drew Fustini <[email protected]> --- hw/riscv/Kconfig | 4 ++++ hw/riscv/meson.build | 2 ++ 2 files changed, 6 insertions(+) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index d89fdfcc8671..98bdebb4b814 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -1,3 +1,6 @@ +config RISCV_CBQRI + bool + config RISCV_IOMMU bool @@ -68,6 +71,7 @@ config RISCV_VIRT select PLATFORM_BUS select ACPI select ACPI_PCI + imply RISCV_CBQRI config RISCV_SERVER_PLATFORM_REF bool diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index 6bdabb954473..c7952d67755e 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -19,6 +19,8 @@ riscv_ss.add(when: 'CONFIG_RISCV_IOMMU', if_true: files( 'riscv-iommu.c', 'riscv-iommu-pci.c', 'riscv-iommu-sys.c', 'riscv-iommu-hpm.c')) riscv_ss.add(when: 'CONFIG_MICROBLAZE_V', if_true: files('microblaze-v-generic.c')) riscv_ss.add(when: 'CONFIG_XIANGSHAN_KUNMINGHU', if_true: files('xiangshan_kmh.c')) +riscv_ss.add(when: 'CONFIG_RISCV_CBQRI', if_true: files('cbqri_capacity.c', 'cbqri_bandwidth.c')) + riscv_ss.add(when: 'CONFIG_RISCV_MIPS_CPS', if_true: files('cps.c')) riscv_ss.add(when: 'CONFIG_MIPS_BOSTON_AIA', if_true: files('boston-aia.c')) riscv_ss.add(when: 'CONFIG_K230', if_true: files('k230.c')) -- 2.43.0
