From: Portia Stephens <[email protected]> Update Atlantis documentation to describe the DesignWare UART used.
Signed-off-by: Portia Stephens <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Message-ID: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> --- docs/system/riscv/tt_atlantis.rst | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/docs/system/riscv/tt_atlantis.rst b/docs/system/riscv/tt_atlantis.rst index 539c22354f47..d94d064f4f62 100644 --- a/docs/system/riscv/tt_atlantis.rst +++ b/docs/system/riscv/tt_atlantis.rst @@ -13,7 +13,7 @@ tt-atlantis QEMU model features * 8-core Ascalon-X CPU Cluster * RISC-V compliant Advanced Interrupt Architecture -* 16550A compatible UART +* DW8250 compatible UART x5 * 4 PRCMs (Clock and Reset Controllers) Known limitations @@ -25,9 +25,8 @@ real platform. Notably: * There is no PCI host bridge, so virtio-pci devices cannot be attached. Boots that need block storage must use ``-initrd`` with an initramfs. -* The DesignWare UART is modelled with QEMU's ns16550-compatible - ``serial_mm`` device; DesignWare-specific registers beyond that - set return 0. +* The Atlantis platform has 5 UARTs but only ``UART1`` is currently exposed + on the command line serial interface. ``UART1`` is the Ascalon console. Supported software ------------------ -- 2.55.0
