From: Marco Liebel <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
---
include/hw/hexagon/hexagon.h | 1 +
hw/hexagon/machine_cfg_v73nc_1.h.inc | 73 ++++++++++++++++++++++++++++
hw/hexagon/hexagon_dsp.c | 22 +++++++++
3 files changed, 96 insertions(+)
create mode 100644 hw/hexagon/machine_cfg_v73nc_1.h.inc
diff --git a/include/hw/hexagon/hexagon.h b/include/hw/hexagon/hexagon.h
index 9b5d33ffc3b..a01cf5cb3b3 100644
--- a/include/hw/hexagon/hexagon.h
+++ b/include/hw/hexagon/hexagon.h
@@ -27,6 +27,7 @@ typedef enum {
v71_rev = 0x8c71,
v73_rev = 0x8c73,
v73m_rev = 0xcc73,
+ v73nc_1_rev = 0x8b73,
v81_rev = 0x8781,
v81dgb_1_rev = 0xcc81,
} Rev_t;
diff --git a/hw/hexagon/machine_cfg_v73nc_1.h.inc
b/hw/hexagon/machine_cfg_v73nc_1.h.inc
new file mode 100644
index 00000000000..729e48975c8
--- /dev/null
+++ b/hw/hexagon/machine_cfg_v73nc_1.h.inc
@@ -0,0 +1,73 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+static const struct hexagon_machine_config v73nc_1 = {
+ .cfgbase = 0xd8180000,
+ .l2tcm_size = 0x00000000,
+ .l2vic_base = 0xfc910000,
+ .l2vic_size = 0x00001000,
+ .csr_base = 0xfc900000,
+ .qtmr_region = 0xfc921000,
+ .cfgtable = {
+ .l2tcm_base = 0x0000d800,
+ .reserved0 = 0x00000000,
+ .subsystem_base = 0x00002000,
+ .etm_base = 0x0000d819,
+ .l2cfg_base = 0x0000d81a,
+ .reserved1 = 0x00000000,
+ .l1s0_base = 0x0000d900,
+ .axi2_lowaddr = 0x00003000,
+ .streamer_base = 0x00000000,
+ .reserved2 = 0x00000000,
+ .fastl2vic_base = 0x0000d81e,
+ .jtlb_size_entries = 0x00000080,
+ .coproc_present = 0x00000001,
+ .ext_contexts = 0x00000002,
+ .vtcm_base = 0x0000d900,
+ .vtcm_size_kb = 0x00000800,
+ .l2tag_size = 0x00000400,
+ .l2ecomem_size = 0x00000400,
+ .thread_enable_mask = 0x0000003f,
+ .eccreg_base = 0x00000000,
+ .l2line_size = 0x00000080,
+ .tiny_core = 0x00000000,
+ .l2itcm_size = 0x00000000,
+ .l2itcm_base = 0x0000d800,
+ .reserved3 = 0x00000000,
+ .dtm_present = 0x00000000,
+ .dma_version = 0x00000002,
+ .hvx_vec_log_length = 0x00000007,
+ .core_id = 0x00000000,
+ .core_count = 0x00000000,
+ .coproc2_reg0 = 0x00000040,
+ .coproc2_reg1 = 0x00000020,
+ .v2x_mode = 0x00000001,
+ .coproc2_reg2 = 0x00000001,
+ .coproc2_reg3 = 0x00000000,
+ .coproc2_reg4 = 0x00000000,
+ .coproc2_reg5 = 0x00000000,
+ .coproc2_reg6 = 0x00000000,
+ .coproc2_reg7 = 0x00000000,
+ .acd_preset = 0x00000000,
+ .mnd_preset = 0x00000000,
+ .l1d_size_kb = 0x00000010,
+ .l1i_size_kb = 0x00000020,
+ .l1d_write_policy = 0x00000002,
+ .vtcm_bank_width = 0x00000080,
+ .reserved4 = 0x00000001,
+ .reserved5 = 0x00000000,
+ .reserved6 = 0x00000000,
+ .coproc2_cvt_mpy_size = 0x0000000a,
+ .consistency_domain = 0x000000e0,
+ .capacity_domain = 0x00000080,
+ .axi3_lowaddr = 0x00004000,
+ .coproc2_int8_subcolumns = 0x00000002,
+ .corecfg_present = 0x00000001,
+ .coproc2_fp16_acc_exp = 0x00000000,
+ .AXIM2_secondary_base = 0x00004000,
+ .AXIM_data_width = 0x00000000,
+ .l1d_ways = 0x00000000,
+ .l1i_ways = 0x00000000,
+ .l2way_num = 0x00000000,
+ .dma_jtlb_entries = 0x00000000,
+ },
+};
diff --git a/hw/hexagon/hexagon_dsp.c b/hw/hexagon/hexagon_dsp.c
index 8824fe10a59..d904d5afa14 100644
--- a/hw/hexagon/hexagon_dsp.c
+++ b/hw/hexagon/hexagon_dsp.c
@@ -30,6 +30,7 @@
#include "machine_cfg_v66g_1024.h.inc"
#include "machine_cfg_v68n_1024.h.inc"
+#include "machine_cfg_v73nc_1.h.inc"
#include "machine_cfg_v81dgb_1.h.inc"
#include "machine_cfg_v81qa_1.h.inc"
@@ -200,6 +201,22 @@ static void v68n_1024_init(ObjectClass *oc, const void
*data)
mc->default_cpus = 6;
}
+static void v73nc_1_config_init(MachineState *machine)
+{
+ hexagon_common_init(machine, v73nc_1_rev, &v73nc_1);
+}
+
+static void v73nc_1_init(ObjectClass *oc, const void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ mc->desc = "Hexagon V73NC_1";
+ mc->init = v73nc_1_config_init;
+ init_mc(mc);
+ mc->default_cpu_type = TYPE_HEXAGON_CPU_V73;
+ mc->default_cpus = 6;
+}
+
static void v81dgb_1_config_init(MachineState *machine)
{
hexagon_common_init(machine, v81dgb_1_rev, &v81dgb_1);
@@ -258,6 +275,11 @@ static const TypeInfo hexagon_machine_types[] = {
.parent = TYPE_HEXAGON_DSP_MACHINE,
.class_init = v68n_1024_init,
},
+ {
+ .name = MACHINE_TYPE_NAME("V73NC_1"),
+ .parent = TYPE_HEXAGON_DSP_MACHINE,
+ .class_init = v73nc_1_init,
+ },
{
.name = MACHINE_TYPE_NAME("V81DGB_1"),
.parent = TYPE_HEXAGON_DSP_MACHINE,
--
2.34.1
