hex_subsys_create() always maps the main DDR at address 0. This is appropriate for hexagon-sim-style machines, but real SoCs map it elsewhere.
Reviewed-by: Pierrick Bouvier <[email protected]> Signed-off-by: Brian Cain <[email protected]> --- include/hw/hexagon/hexagon.h | 2 ++ hw/hexagon/hex-subsys.c | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/include/hw/hexagon/hexagon.h b/include/hw/hexagon/hexagon.h index 79617a068da..01ed03cc833 100644 --- a/include/hw/hexagon/hexagon.h +++ b/include/hw/hexagon/hexagon.h @@ -148,6 +148,8 @@ union hexagon_config_table { }; struct hexagon_machine_config { + /* Base address of the main DDR region */ + hwaddr ddr_base; /* Base address of config table */ uint32_t cfgbase; /* Size of L2 TCM */ diff --git a/hw/hexagon/hex-subsys.c b/hw/hexagon/hex-subsys.c index 9818cf58878..382f45bd09f 100644 --- a/hw/hexagon/hex-subsys.c +++ b/hw/hexagon/hex-subsys.c @@ -136,10 +136,10 @@ void hex_subsys_create(HexagonCommonMachineState *hms, MachineState *machine = MACHINE(hms); MemoryRegion *sysmem = get_system_memory(); - /* Main DDR at the reset vector. */ + /* Main DDR. */ memory_region_init_ram(&hms->ram, NULL, "ddr.ram", machine->ram_size, &error_fatal); - memory_region_add_subregion(sysmem, 0x0, &hms->ram); + memory_region_add_subregion(sysmem, m_cfg->ddr_base, &hms->ram); /* Config-table ROM and the blob that backs it. */ memory_region_init_rom(&hms->cfgtable_rom, NULL, "config_table.rom", -- 2.34.1
