>
> -- a/target/riscv/tcg/cpu_helper.c
> +++ b/target/riscv/tcg/cpu_helper.c
> @@ -943,11 +943,22 @@ void riscv_cpu_set_mode(CPURISCVState *env,
> privilege_mode_t newpriv,
> {
> g_assert(newpriv <= PRV_M && newpriv != PRV_RESERVED);
>
> + CPUState *cs = env_cpu(env);
> +
> if (newpriv != env->priv || env->virt_enabled != virt_en) {
> if (icount_enabled()) {
> riscv_itrigger_update_priv(env);
> }
>
> + if (newpriv != env->priv) {
> + RISCVCPU *cpu = RISCV_CPU(cs);
> +
> + if (cpu->trencoder &&
> + TRACE_ENCODER(cpu->trencoder)->trace_running) {
> + trencoder_trace_ppccd(cpu->trencoder, env->pc);
> + }
> + }
>
On the trap-entry path, env->pc has already been updated to the handler
address, but env->priv still holds the previous privilege level.
Emitting a PPCCD sync packet here therefore pairs the handler PC with
the old privilege level.
- [PATCH v4 05/18] hw/riscv/virt.c add trace encoder... Daniel Henrique Barboza
- [PATCH v4 18/18] docs/specs: document RISC-V hwtra... Daniel Henrique Barboza
- [PATCH v4 10/18] hw/riscv/rv-trace-messages.c: add... Daniel Henrique Barboza
- [PATCH v4 11/18] hw/riscv, target/riscv: send trac... Daniel Henrique Barboza
- [PATCH v4 17/18] hw/riscv/trace: update branch bit... Daniel Henrique Barboza
- [PATCH v4 16/18] hw/riscv/trace-encoder: send bran... Daniel Henrique Barboza
- [PATCH v4 07/18] target/riscv: add initial trace i... Daniel Henrique Barboza
- [PATCH v4 12/18] target/riscv, hw/riscv: send trac... Daniel Henrique Barboza
- Re: [PATCH v4 12/18] target/riscv, hw/riscv: ... Jay Chang
- [PATCH v4 06/18] hw/riscv: add e-trace message hel... Daniel Henrique Barboza
- [PATCH v4 14/18] hw/riscv, target/riscv: send resy... Daniel Henrique Barboza
- [PATCH v4 08/18] hw/riscv/trace-encoder: write e-t... Daniel Henrique Barboza
- [PATCH v4 01/18] hw/riscv: Trace Encoder initial i... Daniel Henrique Barboza
