Patches 1-3 progressively constify CPUState, then 4 and 5 remove dependencies on TARGET_BIG_ENDIAN.
Philippe Mathieu-Daudé (5): target/mips: Constify CPUMIPSTLBContext::map_address() handlers target/mips: Constify get_physical_address() target/mips: Constify read-only CPUMIPSState arguments target/mips: Do not use TARGET_BIG_ENDIAN in cpu.c target/mips: Use CPU endianness in MSA LD.D / ST.D helpers target/mips/cpu.h | 4 ++-- target/mips/internal.h | 10 +++++----- target/mips/tcg/tcg-internal.h | 2 +- target/mips/cpu.c | 13 ++++++++----- target/mips/system/cp0.c | 2 +- target/mips/system/physaddr.c | 9 +++++---- target/mips/tcg/dsp_helper.c | 2 +- target/mips/tcg/exception.c | 2 +- target/mips/tcg/msa_helper.c | 18 ++++++++++++++---- target/mips/tcg/system/cp0_helper.c | 2 +- target/mips/tcg/system/tlb_helper.c | 9 +++++---- 11 files changed, 44 insertions(+), 29 deletions(-) -- 2.55.0
