Re: [PATCH 1/3] target/riscv: Honor Zama16b for halfword AMOs

[Daniel Henrique Barboza]

On 10/24/2026 9:02 AM, GavinQin wrote:

gen_amo() only applies the Zama16b atomicity requirement to accesses
of at least 32 bits. Halfword AMOs therefore retain MO_ALIGN and
raise an address-misaligned exception even when the access is
contained within a naturally aligned 16-byte granule.

Include halfword accesses in the existing Zama16b handling.

Signed-off-by: GavinQin <qinzhengxi...@foxmail.com>
---

Reviewed-by: Daniel Henrique Barboza <daniel.barb...@oss.qualcomm.com>

  target/riscv/tcg/translate.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/tcg/translate.c b/target/riscv/tcg/translate.c
index ede9c2563f..70c1088338 100644
--- a/target/riscv/tcg/translate.c
+++ b/target/riscv/tcg/translate.c
@@ -1159,7 +1159,7 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a,
      MemOp size = mop & MO_SIZE;

mop |= ctx->mo_endianness;

-    if (ctx->cfg_ptr->ext_zama16b && size >= MO_32) {
+    if (ctx->cfg_ptr->ext_zama16b && size >= MO_16) {
          mop |= MO_ATOM_WITHIN16;
      } else {
          mop |= MO_ALIGN;