With instruction fldle, similar with ldle instruction, address of accessed memory should come from register rj rather than rj + rk,. The same with instruction fldgt/fstle/fstgt.
Cc: [email protected] Fixes: 34423c019419 ("target/loongarch: Extract make_address_x() helper") Signed-off-by: Bibo Mao <[email protected]> --- target/loongarch/tcg/insn_trans/trans_fmemory.c.inc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc b/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc index b863ba1dc2..628b33330b 100644 --- a/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_fmemory.c.inc @@ -82,7 +82,7 @@ static bool gen_fload_gt(DisasContext *ctx, arg_frr *a, MemOp mop) CHECK_FPE; gen_helper_asrtgt_d(tcg_env, src1, src2); - addr = make_address_x(ctx, src1, src2); + addr = make_address_i(ctx, src1, 0); tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); maybe_nanbox_load(dest, mop); set_fpr(a->fd, dest); @@ -100,7 +100,7 @@ static bool gen_fstore_gt(DisasContext *ctx, arg_frr *a, MemOp mop) CHECK_FPE; gen_helper_asrtgt_d(tcg_env, src1, src2); - addr = make_address_x(ctx, src1, src2); + addr = make_address_i(ctx, src1, 0); tcg_gen_qemu_st_tl(src3, addr, ctx->mem_idx, mop); return true; @@ -116,7 +116,7 @@ static bool gen_fload_le(DisasContext *ctx, arg_frr *a, MemOp mop) CHECK_FPE; gen_helper_asrtle_d(tcg_env, src1, src2); - addr = make_address_x(ctx, src1, src2); + addr = make_address_i(ctx, src1, 0); tcg_gen_qemu_ld_tl(dest, addr, ctx->mem_idx, mop); maybe_nanbox_load(dest, mop); set_fpr(a->fd, dest); @@ -134,7 +134,7 @@ static bool gen_fstore_le(DisasContext *ctx, arg_frr *a, MemOp mop) CHECK_FPE; gen_helper_asrtle_d(tcg_env, src1, src2); - addr = make_address_x(ctx, src1, src2); + addr = make_address_i(ctx, src1, 0); tcg_gen_qemu_st_tl(src3, addr, ctx->mem_idx, mop); return true; base-commit: 73294d096cc591e122fde9e63db4739de6d84f2b -- 2.54.0
