All of this based on testing alpha-softmmu on sparcv8plus and sparcv9. There were 5 problems with sparcv8plus implementing 64-bit opcodes.
This patch set is based on the "TCGCond improvments" patch set I've previously posted, primarily for its is_unsigned_cond and tcg_high_cond functions. (http://patchwork.ozlabs.org/patch/186567/) r~ Richard Henderson (12): tcg-sparc: Fix brcond2 tcg-sparc: Implement movcond. tcg-sparc: Fix setcond2 tcg-sparc: Fix qemu_st for 32-bit tcg-sparc: Fix setcond tcg-sparc: Fix add2/sub2 tcg-sparc: Use Z constraint for %g0 tcg-sparc: Optimize setcond2 equality compare with 0. tcg-sparc: Drop use of Bicc in favor of BPcc tcg-sparc: Dump illegal opode contents tcg-sparc: Emit BPr insns for brcond_i64 tcg-sparc: Emit MOVR insns for setcond_i64 and movcond_64 sparc-dis.c | 2 +- tcg/sparc/tcg-target.c | 643 ++++++++++++++++++++++++++++--------------------- tcg/sparc/tcg-target.h | 9 +- 3 files changed, 381 insertions(+), 273 deletions(-) -- 1.7.11.4
