On Mon, Oct 08, 2012 at 11:30:36PM -0400, Jason Baron wrote: > From: Jan Kiszka <jan.kis...@siemens.com> > > Both bits are added to the write-1-to-clear mask by default. As the > smbus device does not allow writes at all, we have to remove it from > that mask, also to avoid triggering a runtime assertion. > > Signed-off-by: Jan Kiszka <jan.kis...@siemens.com> > Signed-off-by: Jason Baron <jba...@redhat.com>
Yes but a bugger question for me is why are these writeable while spec says they are W1C? Could you please add a code comment explaining that? > --- > hw/q35_smbus.c | 4 ++++ > 1 files changed, 4 insertions(+), 0 deletions(-) > > diff --git a/hw/q35_smbus.c b/hw/q35_smbus.c > index 5efbe6c..dd64aa2 100644 > --- a/hw/q35_smbus.c > +++ b/hw/q35_smbus.c > @@ -97,6 +97,10 @@ static int ich9_smbus_initfn(PCIDevice *d) > > pci_set_word(d->wmask + PCI_STATUS, > PCI_STATUS_SIG_SYSTEM_ERROR | > PCI_STATUS_DETECTED_PARITY); > + pci_set_word(d->w1cmask + PCI_STATUS, > + pci_get_word(d->w1cmask + PCI_STATUS) & > + ~(PCI_STATUS_SIG_SYSTEM_ERROR | > PCI_STATUS_DETECTED_PARITY)); > + > /* TODO? D31IP.SMIP in chipset configuration space */ > pci_config_set_interrupt_pin(d->config, 0x01); /* interrupt pin 1 */ > > -- > 1.7.1