Hello,
On 2013-11-26 15:04, Sebastian Huber wrote:
The LEON3 processor has support for the CASA instruction which is
normally only available for SPARC V9 processors. Binutils 2.24
and GCC 4.9 will support this instruction for LEON3. GCC uses it to
generate C11 atomic operations.
---
target-sparc/cpu.c | 3 +-
target-sparc/cpu.h | 4 ++-
target-sparc/helper.h | 4 ++-
target-sparc/ldst_helper.c | 26 +++++++++++++-----------
target-sparc/translate.c | 47 ++++++++++++++++++++++++++++---------------
5 files changed, 52 insertions(+), 32 deletions(-)
[...]
this patch doesn't work since the ASI 0x80 used for the synthetic CAS
instruction is not implemented in helper_ld_asi() for !TARGET_SPARC64.
I tried to add a
case 0x80: /* Primary */
{
switch (size) {
case 1:
ret = ldub_raw(addr);
break;
case 2:
ret = lduw_raw(addr);
break;
case 4:
ret = ldl_raw(addr);
break;
default:
case 8:
ret = ldq_raw(addr);
break;
}
}
break;
but this results in a Qemu segmentation fault.
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.
Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
