Hello, would someone please have a look at this.
On 2013-11-28 11:27, Sebastian Huber wrote:
The LEON3 processor has support for the CASA instruction which is normally only available for SPARC V9 processors. Binutils 2.24 and GCC 4.9 will support this instruction for LEON3. GCC uses it to generate C11 atomic operations. The CAS synthetic instruction uses an ASI of 0x80. If TARGET_SPARC64 is not defined use a supervisor data load/store for an ASI of 0x80 in helper_ld_asi()/helper_st_asi(). --- target-sparc/cpu.c | 3 +- target-sparc/cpu.h | 4 ++- target-sparc/helper.h | 4 ++- target-sparc/ldst_helper.c | 28 +++++++++++++++----------- target-sparc/translate.c | 47 ++++++++++++++++++++++++++++--------------- 5 files changed, 54 insertions(+), 32 deletions(-)
-- Sebastian Huber, embedded brains GmbH Address : Dornierstr. 4, D-82178 Puchheim, Germany Phone : +49 89 189 47 41-16 Fax : +49 89 189 47 41-09 E-Mail : sebastian.hu...@embedded-brains.de PGP : Public key available on request. Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
