On 2 December 2013 07:12, Peter Crosthwaite <peter.crosthwa...@xilinx.com> wrote: > Bit 27 of the RX buffer desc word 1 should be set when the packet was > accepted due to specific address register match. Implement. > > This feature is absent from the Xilinx documentation (UG585) but the > behaviour is tested as accurate on real hardware. > > Reported-by: Deepika Dhamija <deep...@xilinx.com> > Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> -- PMM
