From: Svetlana Fedoseeva <s.fedose...@samsung.com> Define TrustZone CPU feature. Set that feature for relevant CPUs.
Signed-off-by: Svetlana Fedoseeva <s.fedose...@samsung.com> Signed-off-by: Sergey Fedorov <s.fedo...@samsung.com> --- target-arm/cpu.c | 4 ++++ target-arm/cpu.h | 1 + 2 files changed, 5 insertions(+) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index d40f2a7..4607ca8 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -439,6 +439,7 @@ static void arm1176_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CACHE_DIRTY_REG); set_feature(&cpu->env, ARM_FEATURE_CACHE_BLOCK_OPS); + set_feature(&cpu->env, ARM_FEATURE_TRUSTZONE); cpu->midr = 0x410fb767; cpu->reset_fpsid = 0x410120b5; cpu->mvfr0 = 0x11111111; @@ -521,6 +522,7 @@ static void cortex_a8_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); + set_feature(&cpu->env, ARM_FEATURE_TRUSTZONE); cpu->midr = 0x410fc080; cpu->reset_fpsid = 0x410330c0; cpu->mvfr0 = 0x11110222; @@ -585,6 +587,7 @@ static void cortex_a9_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); set_feature(&cpu->env, ARM_FEATURE_NEON); set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); + set_feature(&cpu->env, ARM_FEATURE_TRUSTZONE); /* Note that A9 supports the MP extensions even for * A9UP and single-core A9MP (which are both different * and valid configurations; we don't model A9UP). @@ -658,6 +661,7 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_LPAE); + set_feature(&cpu->env, ARM_FEATURE_TRUSTZONE); cpu->midr = 0x412fc0f1; cpu->reset_fpsid = 0x410430f0; cpu->mvfr0 = 0x10110222; diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 9f110f1..0b93e39 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -465,6 +465,7 @@ enum arm_features { ARM_FEATURE_LPAE, /* has Large Physical Address Extension */ ARM_FEATURE_V8, ARM_FEATURE_AARCH64, /* supports 64 bit mode */ + ARM_FEATURE_TRUSTZONE, /* has TrustZone Security Extensions */ }; static inline int arm_feature(CPUARMState *env, int feature) -- 1.7.9.5