Hi Max, On Wed, Oct 15, 2014 at 9:54 PM, Max Filippov <jcmvb...@gmail.com> wrote: > Hi, > > On Thu, Oct 16, 2014 at 5:45 AM, Pranith Kumar <bobby.pr...@gmail.com> wrote: >> Is there something obviously wrong with what I am trying to do? Any help is >> highly appreciated. >> --- a/target-arm/translate.c >> +++ b/target-arm/translate.c >> @@ -7568,6 +7574,7 @@ static void disas_arm_insn(CPUARMState * env, >> DisasContext *s) >> case 5: /* dmb */ >> case 6: /* isb */ >> ARCH(7); >> + tcg_gen_add_i32(cpu_fence_count, cpu_fence_count, 1); > > tcg_gen_addi_i32, as you're adding an immediate. > Enabling TCG debug would catch such errors. > Not sure if that will fix crashing, but it should improve accuracy (:
I had that before the change to tcg_gen_add_i32 and the crashes were still there. But yes, this needs to be changed to use addi. How do I enable the TCG debug build? Thanks! > >> /* We don't emulate caches so these are a no-op. */ >> return; >> default: >> @@ -9740,6 +9747,7 @@ static int disas_thumb2_insn(CPUARMState *env, >> DisasContext *s, uint16_t insn_hw >> case 4: /* dsb */ >> case 5: /* dmb */ >> case 6: /* isb */ >> + tcg_gen_add_i32(cpu_fence_count, cpu_fence_count, 1); > > Here as well. > >> /* These execute as NOPs. */ >> break; >> default: >> @@ -11022,6 +11030,7 @@ static inline void >> gen_intermediate_code_internal(ARMCPU *cpu, >> tcg_gen_debug_insn_start(dc->pc); >> } >> >> + tcg_gen_add_i32(cpu_insn_count, cpu_insn_count, 1); > > And here. > > -- > Thanks. > -- Max -- Pranith
