Hi I would like to do GSOC this summer. The project i have in mind is to implement a set of facilities to make implementing Hardware transactional memory (HTM) easier in QEMU.
HTM has become available in many architecture supported by QEMU, e.g. i386, PowerPC, etc. Currently, necessary memory tracking. conflict detection and transaction rollbak/commit are not available in QEMU. As a result, HTM is supported in a very rudimentary fashion in PowerPC, i.e. the transaction begins (tbegin in PowerPC) always trigger a fault to the fallback code path. Even though HTM is supported by different architectures, the underlying principle are very similar and therefore it is beneficial to provide a set of facilities to make implementing HTM easier in QEMU. These facilities should include. A modified software TLB to make memory address and value tracking simple. A performant and memory efficient value/address tracking facility to detect read/write conflicts for transactions. A performant and memory efficient mechanism to rollback and commit memory accesses. A mechanism to abort transactions on the current processor as well as remote processor. I will come up with a more detailed proposal as application time draws close. Any suggestions are appreciated at the moment. Thanks, Xin
