On Thu, May 7, 2015 at 6:59 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 6 May 2015 at 23:50, Peter Crosthwaite <peter.crosthwa...@xilinx.com> > wrote: >> GIC generally uses a 4k memory region for the various subregions, such >> as GICC, GICD, GICV and GICH. Macroify this number in the publicly >> visible header. > >> +#define ARM_GIC_REGION_SIZE 0x1000 > > I don't think it makes sense to have a single constant for this. > In GICv2, the GICD distributor region is 4K, but the GICC CPU > region is 8K. We don't currently actually implement the register > in the second page (GICC_DIR), but exporting a constant that's > the wrong size doesn't seem right (especially if it means the > board model will end up repeating the GICC pages at the wrong > points!). > > In GICv1, on the other hand, the GICC region was 4K, so we > can't just have a single #define for GICC size either. >
Ok patch dropped. Regards, Peter > -- PMM >
