Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com>
---
Makefile.target | 2 +-
configure | 3 ++-
target-arm/cpu.h | 40 +++++++++++++++-------------------------
target-arm/translate.c | 3 +--
target-arm/translate.h | 4 ++--
target-multi/helper.h | 1 +
6 files changed, 22 insertions(+), 31 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 0043286..c02be7d 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -13,7 +13,7 @@ QEMU_CFLAGS += -I.. -I$(SRC_PATH)/target-$(TARGET_BASE_ARCH)
-DNEED_CPU_H
ARCH_DIRS = $(TARGET_BASE_ARCH)
ifeq ($(TARGET_BASE_ARCH), multi)
-ARCH_DIRS += microblaze
+ARCH_DIRS += microblaze arm
endif
QEMU_CFLAGS+=-I$(SRC_PATH)/include
diff --git a/configure b/configure
index 880faa4..6116f65 100755
--- a/configure
+++ b/configure
@@ -5281,7 +5281,7 @@ if [ "$HOST_VARIANT_DIR" != "" ]; then
fi
case "$target_name" in
multi)
- MULTI_TARGETS="microblaze"
+ MULTI_TARGETS="microblaze aarch64"
esac
case "$target_name" in
i386|x86_64)
@@ -5362,6 +5362,7 @@ for i in $ARCH $TARGET_BASE_ARCH $MULTI_TARGETS; do
echo "CONFIG_ALPHA_DIS=y" >> config-all-disas.mak
;;
arm|aarch64)
+ echo "CONFIG_ARCH_MULTI=y" >> $config_target_mak
echo "CONFIG_ARM_DIS=y" >> $config_target_mak
echo "CONFIG_ARM_DIS=y" >> config-all-disas.mak
if test -n "${cxx}"; then
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 53a8051..a57ef77 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -23,18 +23,18 @@
#include "kvm-consts.h"
-#if defined(TARGET_AARCH64)
- /* AArch64 definitions */
-# define TARGET_LONG_BITS 64
-#else
-# define TARGET_LONG_BITS 32
-#endif
+#include "qemu-common.h"
-#define TARGET_IS_BIENDIAN 1
+#include "target-multi/cpu-head.h"
+#undef CPUArchState
#define CPUArchState struct CPUARMState
-#include "qemu-common.h"
+#ifndef TARGET_AARCH64
+# undef TARGET_LONG_BITS
+# define TARGET_LONG_BITS 32
+#endif
+
#include "exec/cpu-defs.h"
#include "fpu/softfloat.h"
@@ -93,8 +93,6 @@
struct arm_boot_info;
-#define NB_MMU_MODES 7
-
/* We currently assume float and double are IEEE single and double
precision respectively.
Doing runtime conversions is tricky because VFP registers may contain
@@ -1457,21 +1455,19 @@ bool write_cpustate_to_list(ARMCPU *cpu);
#define ARM_CPUID_TI915T 0x54029152
#define ARM_CPUID_TI925T 0x54029252
-#if defined(CONFIG_USER_ONLY)
-#define TARGET_PAGE_BITS 12
-#else
/* The ARM MMU allows 1k pages. */
/* ??? Linux doesn't actually use these, and they're deprecated in recent
architecture revisions. Maybe a configure option to disable them. */
+#if !defined(CONFIG_USER_ONLY) && !defined(TARGET_MULTI)
+#undef TARGET_PAGE_BITS
#define TARGET_PAGE_BITS 10
#endif
-#if defined(TARGET_AARCH64)
-# define TARGET_PHYS_ADDR_SPACE_BITS 48
-# define TARGET_VIRT_ADDR_SPACE_BITS 64
-#else
-# define TARGET_PHYS_ADDR_SPACE_BITS 40
-# define TARGET_VIRT_ADDR_SPACE_BITS 32
+#if !defined(TARGET_AARCH64)
+#undef TARGET_PHYS_ADDR_SPACE_BITS
+#undef TARGET_VIRT_ADDR_SPACE_BITS
+#define TARGET_PHYS_ADDR_SPACE_BITS 40
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)
@@ -1784,12 +1780,6 @@ static inline bool arm_singlestep_active(CPUARMState
*env)
#define ARM_TBFLAG_NS(F) \
(((F) & ARM_TBFLAG_NS_MASK) >> ARM_TBFLAG_NS_SHIFT)
-#define cpu_get_tb_cpu_state(env, pc, cs_base, flags) \
- ((env)->container->cpu_get_tb_cpu_state((env)->container, (pc), \
- (cs_base), (flags)))
-
-#define cpu_mmu_index(env) ((env)->container->cpu_mmu_index((env)->container))
-
#include "exec/cpu-all.h"
#include "exec/exec-all.h"
diff --git a/target-arm/translate.c b/target-arm/translate.c
index a33343d..9d5901e 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -60,7 +60,6 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#define IS_USER(s) (s->user)
#endif
-TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
@@ -87,7 +86,7 @@ void arm_translate_init(void)
{
int i;
- cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+ multi_translate_init();
for (i = 0; i < 16; i++) {
cpu_R[i] = tcg_global_mem_new_i32(TCG_AREG0,
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 9829576..4150198 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -1,6 +1,8 @@
#ifndef TARGET_ARM_TRANSLATE_H
#define TARGET_ARM_TRANSLATE_H
+#include "target-multi/translate.h"
+
/* internal defines */
typedef struct DisasContext {
target_ulong pc;
@@ -61,8 +63,6 @@ typedef struct DisasContext {
TCGv_i64 tmp_a64[TMP_A64_MAX];
} DisasContext;
-extern TCGv_ptr cpu_env;
-
static inline int arm_dc_feature(DisasContext *dc, int feature)
{
return (dc->features & (1ULL << feature)) != 0;
diff --git a/target-multi/helper.h b/target-multi/helper.h
index 9308cc5..75a0b05 100644
--- a/target-multi/helper.h
+++ b/target-multi/helper.h
@@ -1 +1,2 @@
+#include <target-arm/helper.h>
#include <target-microblaze/helper.h>
--
1.9.1
