All these do now is rename the generic exec functions. Remove. Signed-off-by: Peter Crosthwaite <crosthwaite.pe...@gmail.com> --- linux-user/main.c | 4 ++-- target-arm/cpu.h | 9 --------- 2 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/linux-user/main.c b/linux-user/main.c index 50fbd7e..fb7b138 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -678,7 +678,7 @@ void cpu_loop(CPUARMState *env) for(;;) { cpu_exec_start(cs); - trapnr = cpu_arm_exec(env); + trapnr = cpu_exec(env); cpu_exec_end(cs); switch(trapnr) { case ARMAR_EXCP_UDEF: @@ -1009,7 +1009,7 @@ void cpu_loop(CPUARMState *env) for (;;) { cpu_exec_start(cs); - trapnr = cpu_arm_exec(env); + trapnr = cpu_exec(env); cpu_exec_end(cs); switch (trapnr) { diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 147aaeb..bdcd331 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -486,7 +486,6 @@ typedef struct CPUARMState { #include "cpu-qom.h" ARMCPU *cpu_arm_init(const char *cpu_model); -int cpu_arm_exec(CPUARMState *s); uint32_t do_arm_semihosting(CPUARMState *env); void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); @@ -496,11 +495,6 @@ static inline bool is_a64(CPUARMState *env) return env->aarch64; } -/* you can call this signal handler from your SIGBUS and SIGSEGV - signal handlers to inform the virtual CPU of exceptions. non zero - is returned if the signal was handled by the virtual CPU. */ -int cpu_arm_signal_handler(int host_signum, void *pinfo, - void *puc); int arm_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, int mmu_idx); @@ -1564,9 +1558,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx) #define cpu_init(cpu_model) CPU(cpu_arm_init(cpu_model)) -#define cpu_exec cpu_arm_exec -#define cpu_gen_code cpu_arm_gen_code -#define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list /* ARM has the following "translation regimes" (as the ARM ARM calls them): -- 1.9.1