On Thu, May 28, 2015 at 12:40:42PM +0100, Peter Maydell wrote: > On 28 May 2015 at 09:30, Peter Maydell <peter.mayd...@linaro.org> wrote: > > On 28 May 2015 at 06:30, Edgar E. Iglesias <edgar.igles...@xilinx.com> > > wrote: > >>> @@ -381,6 +381,9 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t > >>> op, uint32_t imm) > >>> */ > >>> if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & > >>> SCTLR_UMA)) { > >>> env->exception.target_el = exception_target_el(env); > >>> + env->exception.syndrome = syn_aa64_sysregtrap(0, extract32(op, > >>> 0, 3), > >>> + extract32(op, 3, > >>> 3), 4, > >>> + 0x1f, imm, 0); > >> > >> Did you possibly reverse the argument order of 0x1f and imm? > > > > Ah, you're right; I was confused because the argument order of our > > syn_aa64_sysregtrap() and the pseudocode AArch64.SystemRegisterTrap > > is different (the latter follows the field order in the syndrome > > register and ours doesn't). > > I also managed to forget the signoff: > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > > If this is the only fix in this series (I think you have one or two > patches still left to review) then I propose to add it as I put > the patches in target-arm.next: > > - 0x1f, imm, 0); > + imm, 0x1f, 0);
Yes, with these changes: Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> One of the patches had a missing target_el assigment for CP_ACCESS_TRAP_UNCATEGORIZED that I commented on a while back. I'll have a look again. Thanks, Edgar > > thanks > -- PMM