On Mon, Jun 29, 2015 at 1:11 PM, Jean-Christophe Dubois <j...@tribudubois.net> wrote: > This is to prepare to accomodate the SOC requirements. > > Signed-off-by: Jean-Christophe Dubois <j...@tribudubois.net> > --- > > Changes since v1: > * not present on v1 > > Changes since v2: > * not present on v2 > > Changes since v3: > * not present on v3 > > Changes since v4: > * not present on v4 > > Changes since v5: > * not present on v5 > > Changes since v6: > * not present on v6 > > Changes since v7: > * Splited the i.MX EPIT emulator into a header file and a source file > > hw/timer/imx_epit.c | 65 +++++------------------------------ > include/hw/timer/imx_epit.h | 83 > +++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 92 insertions(+), 56 deletions(-) > create mode 100644 include/hw/timer/imx_epit.h > > diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c > index ffefc22..39fc3f1 100644 > --- a/hw/timer/imx_epit.c > +++ b/hw/timer/imx_epit.c > @@ -5,23 +5,17 @@ > * Copyright (c) 2011 NICTA Pty Ltd > * Originally written by Hans Jiang > * Updated by Peter Chubb > - * Updated by Jean-Christophe Dubois > + * Updated by Jean-Christophe Dubois <j...@tribudubois.net> > * > * This code is licensed under GPL version 2 or later. See > * the COPYING file in the top-level directory. > * > */ > > -#include "hw/hw.h" > -#include "qemu/bitops.h" > -#include "qemu/timer.h" > -#include "hw/ptimer.h" > -#include "hw/sysbus.h" > -#include "hw/arm/imx.h" > +#include "hw/timer/imx_epit.h" > +#include "hw/misc/imx_ccm.h" > #include "qemu/main-loop.h" > > -#define TYPE_IMX_EPIT "imx.epit" > - > #define DEBUG_TIMER 0 > #if DEBUG_TIMER > > @@ -61,30 +55,6 @@ static char const *imx_epit_reg_name(uint32_t reg) > # define IPRINTF(fmt, args...) do {} while (0) > #endif > > -#define IMX_EPIT(obj) \ > - OBJECT_CHECK(IMXEPITState, (obj), TYPE_IMX_EPIT) > - > -/* > - * EPIT: Enhanced periodic interrupt timer > - */ > - > -#define CR_EN (1 << 0) > -#define CR_ENMOD (1 << 1) > -#define CR_OCIEN (1 << 2) > -#define CR_RLD (1 << 3) > -#define CR_PRESCALE_SHIFT (4) > -#define CR_PRESCALE_MASK (0xfff) > -#define CR_SWR (1 << 16) > -#define CR_IOVW (1 << 17) > -#define CR_DBGEN (1 << 18) > -#define CR_WAITEN (1 << 19) > -#define CR_DOZEN (1 << 20) > -#define CR_STOPEN (1 << 21) > -#define CR_CLKSRC_SHIFT (24) > -#define CR_CLKSRC_MASK (0x3 << CR_CLKSRC_SHIFT) > - > -#define EPIT_TIMER_MAX 0XFFFFFFFFUL > - > /* > * Exact clock frequencies vary from board to board. > * These are typical. > @@ -96,23 +66,6 @@ static const IMXClk imx_epit_clocks[] = { > CLK_32k, /* 11 ipg_clk_32k -- ~32kHz */ > }; > > -typedef struct { > - SysBusDevice busdev; > - ptimer_state *timer_reload; > - ptimer_state *timer_cmp; > - MemoryRegion iomem; > - DeviceState *ccm; > - > - uint32_t cr; > - uint32_t sr; > - uint32_t lr; > - uint32_t cmp; > - uint32_t cnt; > - > - uint32_t freq; > - qemu_irq irq; > -} IMXEPITState; > - > /* > * Update interrupt status > */ > @@ -174,9 +127,9 @@ static void imx_epit_reset(DeviceState *dev) > > static uint32_t imx_epit_update_count(IMXEPITState *s) > { > - s->cnt = ptimer_get_count(s->timer_reload); > + s->cnt = ptimer_get_count(s->timer_reload); > > - return s->cnt; > + return s->cnt; > } > > static uint64_t imx_epit_read(void *opaque, hwaddr offset, unsigned size) > @@ -344,13 +297,13 @@ void imx_timerp_create(const hwaddr addr, qemu_irq irq, > DeviceState *ccm) > } > > static const MemoryRegionOps imx_epit_ops = { > - .read = imx_epit_read, > - .write = imx_epit_write, > - .endianness = DEVICE_NATIVE_ENDIAN, > + .read = imx_epit_read, > + .write = imx_epit_write, > + .endianness = DEVICE_NATIVE_ENDIAN, > }; > > static const VMStateDescription vmstate_imx_timer_epit = { > - .name = "imx.epit", > + .name = TYPE_IMX_EPIT, > .version_id = 2, > .minimum_version_id = 2, > .fields = (VMStateField[]) { > diff --git a/include/hw/timer/imx_epit.h b/include/hw/timer/imx_epit.h > new file mode 100644 > index 0000000..dbc99ca > --- /dev/null > +++ b/include/hw/timer/imx_epit.h > @@ -0,0 +1,83 @@ > +/* > + * i.MX EPIT Timer > + * > + * Copyright (c) 2008 OK Labs > + * Copyright (c) 2011 NICTA Pty Ltd > + * Originally written by Hans Jiang > + * Updated by Peter Chubb > + * Updated by Jean-Christophe Dubois <j...@tribudubois.net> > + * > + * Permission is hereby granted, free of charge, to any person obtaining a > copy > + * of this software and associated documentation files (the "Software"), to > deal > + * in the Software without restriction, including without limitation the > rights > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell > + * copies of the Software, and to permit persons to whom the Software is > + * furnished to do so, subject to the following conditions: > + * > + * The above copyright notice and this permission notice shall be included in > + * all copies or substantial portions of the Software. > + * > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING > FROM, > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN > + * THE SOFTWARE. > + */ > + > +#ifndef IMX_EPIT_H > +#define IMX_EPIT_H > + > +#include "hw/sysbus.h" > +#include "hw/ptimer.h" > + > +/* > + * EPIT: Enhanced periodic interrupt timer > + */ > + > +#define CR_EN (1 << 0) > +#define CR_ENMOD (1 << 1) > +#define CR_OCIEN (1 << 2) > +#define CR_RLD (1 << 3) > +#define CR_PRESCALE_SHIFT (4) > +#define CR_PRESCALE_MASK (0xfff) > +#define CR_SWR (1 << 16) > +#define CR_IOVW (1 << 17) > +#define CR_DBGEN (1 << 18) > +#define CR_WAITEN (1 << 19) > +#define CR_DOZEN (1 << 20) > +#define CR_STOPEN (1 << 21) > +#define CR_CLKSRC_SHIFT (24) > +#define CR_CLKSRC_MASK (0x3 << CR_CLKSRC_SHIFT) > + > +#define EPIT_TIMER_MAX 0XFFFFFFFFUL > + > +#define TYPE_IMX_EPIT "imx.epit" > +#define IMX_EPIT(obj) OBJECT_CHECK(IMXEPITState, (obj), TYPE_IMX_EPIT) > + > +typedef struct { > + /* <private> */ > + SysBusDevice parent_obj; > + > + /* <public> */ > + ptimer_state *timer_reload; > + ptimer_state *timer_cmp; > + MemoryRegion iomem; > + DeviceState *ccm; > + > + uint32_t cr; > + uint32_t sr; > + uint32_t lr; > + uint32_t cmp; > + uint32_t cnt; > + > + uint32_t freq; > + qemu_irq irq; > +} IMXEPITState; > + > +void imx_timerp_create(const hwaddr addr, > + qemu_irq irq, > + DeviceState *ccm); > +
Qdev construction helpers are depracated in favor of just inlining the qdev_creation process in the machine model. Since this is pre-existing though, I would just leave it in imx.h. Regards, Peter > +#endif /* IMX_EPIT_H */ > -- > 2.1.4 > >