On 29 February 2016 at 16:24, Sergey Fedorov <serge.f...@gmail.com> wrote: > On 29.02.2016 19:18, Peter Maydell wrote: >> Starting with the ARMv7 Virtualization Extensions, the A32 and T32 >> instruction sets provide instructions "MSR (banked)" and "MRS >> (banked)" which can be used to access registers for a mode other >> than the current one: >> * R<m>_<mode> >> * ELR_hyp >> * SPSR_<mode> >> >> Implement the missing instructions. > > Likely, there is no disassembling support in QEMU for these instructions > as well. Are you going to add it?
No, I don't plan to. thanks -- PMM
