On 7 December 2016 at 18:07, Richard Henderson <r...@twiddle.net> wrote: > When al == xzr, we cannot use addi/subi because that encodes xsp. > Force a zero into the temp register for that (rare) case.
Incidentally I was slightly surprised that the optimisation pass didn't turn "add2 rlo, rhi, 0, 0, 0, 0" into moves of 0 into rlo and rhi. Constant shifts of xzr in the guest don't seem worth spending much effort on optimising though :-) thanks -- PMM
