On 05/12/2017 12:36 AM, Philippe Mathieu-Daudé wrote: > In this patch > http://lists.nongnu.org/archive/html/qemu-devel/2017-05/msg01466.html > Aurelien does: > > - tcg_gen_shri_i32(cpu_sr_q, src, SR_Q); > - tcg_gen_andi_i32(cpu_sr_q, cpu_sr_q, 1); > + tcg_gen_extract_i32(cpu_sr_q, src, SR_Q, 1); > > having: > > #define SR_Q 8 > > I wanted to write a Coccinelle script to check for this pattern. > My first version was wrong, as Richard Henderson reminded me this > pattern can be applied as long as the len argument (here "1") is a > Mersenne prime (all least significant bits as "1").
Side note: while you are correct that a Mersenne prime is one less than a power of 2, your use of the term here is incorrect. You are looking for ALL instances of numbers that are one less than a power of two, and not just the Mersenne primes. (For instance, 0xf is NOT a Mersenne prime, but IS a candidate for an optimization using a length of 4.) -- Eric Blake, Principal Software Engineer Red Hat, Inc. +1-919-301-3266 Virtualization: qemu.org | libvirt.org
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