Am 24.11.2010 12:00, Alexander Graf wrote: >>>> According to to the Intel IA-32 Software Developers Manual Vol 3 page >>>> 290, the version should be 0x14 Pentium 4/Xeon CPUs anyway. >>>> >>>> Signed-off-by: Andrew de Quincey <a...@lidskialf.net> >>>> >>>> diff --git a/hw/apic.c b/hw/apic.c >>>> index 5f4a87c..20304e0 100644 >>>> --- a/hw/apic.c >>>> +++ b/hw/apic.c >>>> @@ -704,7 +704,7 @@ static uint32_t apic_mem_readl(void *opaque, >>>> target_phys_addr_t addr) >>>> val = s->id << 24; >>>> break; >>>> case 0x03: /* version */ >>>> - val = 0x11 | ((APIC_LVT_NB - 1) << 16); /* version 0x11 */ >>>> + val = 0x14 | ((APIC_LVT_NB - 1) << 16); /* version 0x14 */ >>> >>> What exactly changed between the versions? Did new registers get introduced >>> or subtle behavior change? Is there some proper documentation on the >>> changed between the apic versions? >> >> I've been trying to find out; I'm still searching intel's docs to find >> an 0x11 version to compare with :( > > Please try very hard. I haven't found anything myself either yet, but without > a spec it's hard to justify these changes upstream :(. > >> The failure mode is that mac os X SL whines about the APIC being an >> unexpected version (0x11) and it wants 0x14 as a minimum. > > Yup, I remember that issue. To really make this all useful, we also need to > change the numbers in KVM though.
Also, the version has to be set depending on the emulated CPU (even more when there will be emulation differences). Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux
