Hello all, I have 2 problems regarding UART (pl011) in the emulated board VersatilePB. (I am using *QEMU version 2.8.1.*)
*My main goal is*: Disturbing the UART registers (such UARTCR, UARTLCR_H ... etc) in order to simulate hardware faults (which can make bit flips in the hardware registers through radiation for example). *My 2 questions are:* *First:* Are interrupts activated in the emulated pl011 ? I mean, if I enabled the interrupt bits for UARTTXINTR, will this trigger an interrupt when the FIFO reaches a certain level? *Second:* Another problem is that I can't find some of the UART registers (which are in the data sheet PrimeCell UART (PL011)), in QEMU's emulated UART pl011. *These are the registers which I can't find their matches in the structure PL011State:* 1.) Interrupt FIFO level select register, UARTIFLS 2.) Raw interrupt status register, UARTRIS 3.) Masked interrupt status register, UARTMIS 4.) Interrupt clear register, UARTICR 5.) Peripheral identification registers, UARTPeriphID0-3 6.) PrimeCell identification registers, UARTPCellID0-3 *This is the structure where I get pl011 emulated registers:* typedef struct PL011State { SysBusDevice parent_obj; MemoryRegion iomem; uint32_t readbuff; uint32_t flags; uint32_t lcr; uint32_t rsr; uint32_t cr; uint32_t dmacr; uint32_t int_enabled; uint32_t int_level; uint32_t read_fifo[16]; uint32_t ilpr; uint32_t ibrd; uint32_t fbrd; uint32_t ifl; int read_pos; int read_count; int read_trigger; CharBackend chr; qemu_irq irq; const unsigned char *id; } PL011State -- Best Regards, Ramy Sameh Embedded Software Engineer +2-010-172-777-14