On 11/23/2017 01:29 AM, Alistair Francis wrote:
On Wed, Nov 8, 2017 at 3:32 AM, KONRAD Frederic
<frederic.kon...@adacore.com> wrote:
This adds the TTC to the xlnx-zynqmp board according to the ultrascale TRM.

Signed-off-by: KONRAD Frederic <frederic.kon...@adacore.com>
---
  hw/arm/xlnx-zynqmp.c         | 25 +++++++++++++++++++++++++
  include/hw/arm/xlnx-zynqmp.h |  3 +++
  2 files changed, 28 insertions(+)

diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 2b27daf..bd26a46 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -78,6 +78,14 @@ static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = {
      19, 20,
  };

+static const uint64_t ttc_addr[XLNX_ZYNQMP_NUM_TTC] = {
+    0xFF110000, 0xFF120000, 0xFF130000, 0xFF140000,
+};
+
+static const uint64_t ttc_intr[XLNX_ZYNQMP_NUM_TTC] = {
+    36, 39, 42, 45,
+};
+
  typedef struct XlnxZynqMPGICRegion {
      int region_index;
      uint32_t address;
@@ -174,6 +182,11 @@ static void xlnx_zynqmp_init(Object *obj)

      object_initialize(&s->dpdma, sizeof(s->dpdma), TYPE_XLNX_DPDMA);
      qdev_set_parent_bus(DEVICE(&s->dpdma), sysbus_get_default());
+
+    for (i = 0; i < XLNX_ZYNQMP_NUM_TTC; i++) {
+        object_initialize(&s->ttc[i], sizeof(s->ttc[i]), TYPE_CADENCE_TTC);
+        qdev_set_parent_bus(DEVICE(&s->ttc[i]), sysbus_get_default());
+    }
  }

  static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -422,6 +435,18 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
**errp)
                               &error_abort);
      sysbus_mmio_map(SYS_BUS_DEVICE(&s->dpdma), 0, DPDMA_ADDR);
      sysbus_connect_irq(SYS_BUS_DEVICE(&s->dpdma), 0, gic_spi[DPDMA_IRQ]);
+
+    for (i = 0; i < XLNX_ZYNQMP_NUM_TTC; i++) {
+        object_property_set_bool(OBJECT(&s->ttc[i]), true, "realized", &err);
+

No new line here.

Otherwise:

Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com>

Alistair

Thanks,

I'll fix that and resend.

Fred


+        if (err) {
+            error_propagate(errp, err);
+            return;
+        }
+        sysbus_mmio_map(SYS_BUS_DEVICE(&s->ttc[i]), 0, ttc_addr[i]);
+        sysbus_connect_irq(SYS_BUS_DEVICE(&s->ttc[i]), 0,
+                           gic_spi[ttc_intr[i]]);
+    }
  }

  static Property xlnx_zynqmp_props[] = {
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 6eff81a..9a20f6e 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -28,6 +28,7 @@
  #include "hw/ssi/xilinx_spips.h"
  #include "hw/dma/xlnx_dpdma.h"
  #include "hw/display/xlnx_dp.h"
+#include "hw/timer/cadence_ttc.h"

  #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp"
  #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
@@ -39,6 +40,7 @@
  #define XLNX_ZYNQMP_NUM_UARTS 2
  #define XLNX_ZYNQMP_NUM_SDHCI 2
  #define XLNX_ZYNQMP_NUM_SPIS 2
+#define XLNX_ZYNQMP_NUM_TTC 4

  #define XLNX_ZYNQMP_NUM_OCM_BANKS 4
  #define XLNX_ZYNQMP_OCM_RAM_0_ADDRESS 0xFFFC0000
@@ -85,6 +87,7 @@ typedef struct XlnxZynqMPState {
      XilinxSPIPS spi[XLNX_ZYNQMP_NUM_SPIS];
      XlnxDPState dp;
      XlnxDPDMAState dpdma;
+    CadenceTTCState ttc[XLNX_ZYNQMP_NUM_TTC];

      char *boot_cpu;
      ARMCPU *boot_cpu_ptr;
--
1.8.3.1



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