On Wed, Apr 25, 2018 at 4:59 PM Michael Clark <m...@sifive.com> wrote:
> mtval/stval must be set on all exceptions but zero is
> a legal value if there is no exception specific info.
> Placing the instruction bytes for illegal instruction
> exceptions in mtval/stval is an optional feature and
> is currently not supported by QEMU RISC-V.
> Cc: Sagar Karandikar <sag...@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbast...@mail.uni-paderborn.de>
> Cc: Palmer Dabbelt <pal...@sifive.com>
> Cc: Alistair Francis <alistair.fran...@wdc.com>
> Signed-off-by: Michael Clark <m...@sifive.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/helper.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
> diff --git a/target/riscv/helper.c b/target/riscv/helper.c
> index 459fc97..3b57e13 100644
> --- a/target/riscv/helper.c
> +++ b/target/riscv/helper.c
> @@ -492,6 +492,10 @@ void riscv_cpu_do_interrupt(CPUState *cs)
> ": badaddr 0x" TARGET_FMT_lx, env->mhartid,
env->badaddr);
> }
> env->sbadaddr = env->badaddr;
> + } else {
> + /* otherwise we must clear sbadaddr/stval
> + * todo: support populating stval on illegal instructions */
> + env->sbadaddr = 0;
> }
> target_ulong s = env->mstatus;
> @@ -513,6 +517,10 @@ void riscv_cpu_do_interrupt(CPUState *cs)
> ": badaddr 0x" TARGET_FMT_lx, env->mhartid,
env->badaddr);
> }
> env->mbadaddr = env->badaddr;
> + } else {
> + /* otherwise we must clear mbadaddr/mtval
> + * todo: support populating mtval on illegal instructions */
> + env->mbadaddr = 0;
> }
> target_ulong s = env->mstatus;
> --
> 2.7.0
