From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
This series adds support for Extended Addressing to our MicroBlaze
models. It adds both the non-MMU load/store EA and the extended MMU
addressing.
There are several ways to implement this but since there are further
64-bit extensions in the pipe, I've chosen to convert the cpu_SR
special regs to 64-bit. Both non-EA and EA enabled cores run out of
the same build with TARGET_LONG_BITS=64.
Patches 30 - 36 are new patches cleaning up code suggested during
review.
Comments?
Thanks & Best regards,
Edgar
ChangeLog:
v1 -> v2:
* Add patch to simplify address computation using tcg_gen_addi_i32()
* Add patches to cleanup eval_cond_jmp using tcg_gen_movcond_i32()
* Add patch to cleanup microblaze MMU logs
* Correct trap_userspace() usage when adding Extended Addressing
* Correct name for special register sr13 to redr
Edgar E. Iglesias (36):
target-microblaze: dec_load: Use bool instead of unsigned int
target-microblaze: dec_store: Use bool instead of unsigned int
target-microblaze: compute_ldst_addr: Use bool instead of int
target-microblaze: Fallback to our latest CPU version
target-microblaze: Correct special register array sizes
target-microblaze: Correct the PVR array size
target-microblaze: Tighten up TCGv_i32 vs TCGv type usage
target-microblaze: Remove USE_MMU PVR checks
target-microblaze: Conditionalize setting of PVR11_USE_MMU
target-microblaze: Bypass MMU with MMU_NOMMU_IDX
target-microblaze: Make compute_ldst_addr always use a temp
target-microblaze: Remove pointer indirection for ld/st addresses
target-microblaze: Use TCGv for load/store addresses
target-microblaze: Name special registers we support
target-microblaze: Break out trap_userspace()
target-microblaze: Break out trap_illegal()
target-microblaze: dec_msr: Use bool and extract32
target-microblaze: dec_msr: Reuse more code when reg-decoding
target-microblaze: dec_msr: Fix MTS to FSR
target-microblaze: Make special registers 64-bit
target-microblaze: Setup for 64bit addressing
target-microblaze: Add Extended Addressing
target-microblaze: Implement MFSE EAR
target-microblaze: mmu: Add R_TBLX_MISS macros
target-microblaze: mmu: Remove unused register state
target-microblaze: mmu: Prepare for 64-bit addresses
target-microblaze: mmu: Add a configurable output address mask
target-microblaze: Add support for extended access to TLBLO
target-microblaze: Allow address sizes between 32 and 64 bits
target-microblaze: Simplify address computation using
tcg_gen_addi_i32()
target-microblaze: mmu: Cleanup debug log messages
target-microblaze: Use table based condition-codes conversion
target-microblaze: Remove argument b in eval_cc()
target-microblaze: Convert env_btaken to i64
target-microblaze: Convert env_btarget to i64
target-microblaze: Use tcg_gen_movcond in eval_cond_jmp
configure | 1 +
linux-user/microblaze/cpu_loop.c | 4 +-
target/microblaze/cpu.c | 30 +-
target/microblaze/cpu.h | 20 +-
target/microblaze/helper.c | 30 +-
target/microblaze/helper.h | 8 +-
target/microblaze/mmu.c | 81 ++--
target/microblaze/mmu.h | 17 +-
target/microblaze/op_helper.c | 31 +-
target/microblaze/translate.c | 926 +++++++++++++++++++--------------------
10 files changed, 585 insertions(+), 563 deletions(-)
--
2.14.1
