On 22 June 2018 at 21:32, Aaron Lindsay <alind...@codeaurora.org> wrote: > This makes it match its AArch64 equivalent, PMINTENSET_EL1 > > Signed-off-by: Aaron Lindsay <alind...@codeaurora.org> > --- > target/arm/helper.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 96667e6..38fb6a2 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -1763,7 +1763,7 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { > .writefn = pmuserenr_write, .raw_writefn = raw_write }, > { .name = "PMINTENSET", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 > = 1, > .access = PL1_RW, .accessfn = access_tpm, > - .type = ARM_CP_ALIAS, > + .type = ARM_CP_ALIAS | ARM_CP_IO, > .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pminten), > .resetvalue = 0, > .writefn = pmintenset_write, .raw_writefn = raw_write },
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Shouldn't PMINTENCLR and PMINTENCLR_EL1 also be ARM_CP_IO ? thanks -- PMM