Hi, This series seems to have some coding style problems. See output below for more information:
Type: series Message-id: 20180809042206.15726-1-richard.hender...@linaro.org Subject: [Qemu-devel] [PATCH 00/20] target/arm: sve system mode patches === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 Switched to a new branch 'test' 35e9c8f21d target/arm: Pass TCGMemOpIdx to sve memory helpers 6b726db20c target/arm: Rewrite vector gather first-fault loads 42f47a681a target/arm: Rewrite vector gather stores ebdf36bdd6 target/arm: Rewrite vector gather loads bea4bda9bd target/arm: Split contiguous stores for endianness f74a87d369 target/arm: Split contiguous loads for endianness 522240fd71 target/arm: Rewrite helper_sve_st[1234]*_r 291c9a4079 target/arm: Rewrite helper_sve_ld[234]*_r 761fe6b96c target/arm: Rewrite helper_sve_ld1*_r using pages 439f82f39c target/arm: Clear unused predicate bits for LD1RQ 9f664be291 target/arm: Adjust aarch64_cpu_dump_state for system mode SVE 72b8c608a0 target/arm: Handle SVE vector length changes in system mode 4d25343973 target/arm: Pass in current_el to fp and sve_exception_el f63e45c476 target/arm: Fix is_a64 for user-only 77c7e3327f target/arm: Fix arm_current_el for user-only 065eea0432 target/arm: Fix arm_cpu_data_is_big_endian for aa64 user-only 4fb82ef6d0 target/arm: Adjust sve_exception_el bc8fa3f868 target/arm: Define ID_AA64ZFR0_EL1 3233806b21 target/arm: Set ID_AA64PFR0 bits for SVE for -cpu max 2989413056 target/arm: Set ISAR bits for -cpu max === OUTPUT BEGIN === Checking PATCH 1/20: target/arm: Set ISAR bits for -cpu max... Checking PATCH 2/20: target/arm: Set ID_AA64PFR0 bits for SVE for -cpu max... Checking PATCH 3/20: target/arm: Define ID_AA64ZFR0_EL1... Checking PATCH 4/20: target/arm: Adjust sve_exception_el... ERROR: return is not a function, parentheses are not required #57: FILE: target/arm/helper.c:4367: + return (arm_feature(env, ARM_FEATURE_EL2) total: 1 errors, 0 warnings, 113 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 5/20: target/arm: Fix arm_cpu_data_is_big_endian for aa64 user-only... Checking PATCH 6/20: target/arm: Fix arm_current_el for user-only... Checking PATCH 7/20: target/arm: Fix is_a64 for user-only... Checking PATCH 8/20: target/arm: Pass in current_el to fp and sve_exception_el... Checking PATCH 9/20: target/arm: Handle SVE vector length changes in system mode... Checking PATCH 10/20: target/arm: Adjust aarch64_cpu_dump_state for system mode SVE... Checking PATCH 11/20: target/arm: Clear unused predicate bits for LD1RQ... Checking PATCH 12/20: target/arm: Rewrite helper_sve_ld1*_r using pages... Checking PATCH 13/20: target/arm: Rewrite helper_sve_ld[234]*_r... Checking PATCH 14/20: target/arm: Rewrite helper_sve_st[1234]*_r... ERROR: spaces required around that '*' (ctx:WxV) #215: FILE: target/arm/sve_helper.c:4825: + sve_st1_tlb_fn *tlb_fn) ^ total: 1 errors, 0 warnings, 392 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 15/20: target/arm: Split contiguous loads for endianness... Checking PATCH 16/20: target/arm: Split contiguous stores for endianness... Checking PATCH 17/20: target/arm: Rewrite vector gather loads... Checking PATCH 18/20: target/arm: Rewrite vector gather stores... Checking PATCH 19/20: target/arm: Rewrite vector gather first-fault loads... ERROR: spaces required around that '*' (ctx:WxV) #292: FILE: target/arm/sve_helper.c:5216: + zreg_off_fn *off_fn, sve_ld1_tlb_fn *tlb_fn, ^ ERROR: spaces required around that '*' (ctx:WxV) #292: FILE: target/arm/sve_helper.c:5216: + zreg_off_fn *off_fn, sve_ld1_tlb_fn *tlb_fn, ^ ERROR: spaces required around that '*' (ctx:WxV) #293: FILE: target/arm/sve_helper.c:5217: + sve_ld1_nf_fn *nonfault_fn) ^ total: 3 errors, 0 warnings, 573 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 20/20: target/arm: Pass TCGMemOpIdx to sve memory helpers... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@redhat.com