This patch set begins to add MXU instruction support for mips emulation. The patches are split such that the register overhead is added first followed by a series of instructions.
Craig Janeczek (7): target/mips: Add MXU register support target/mips: Add MXU instructions S32I2M and S32M2I target/mips: Add MXU instruction S8LDD target/mips: Add MXU instruction D16MUL target/mips: Add MXU instruction D16MAC target/mips: Add MXU instructions Q8MUL and Q8MULSU target/mips: Add MXU instructions S32LDD and S32LDDR target/mips/cpu.h | 1 + target/mips/translate.c | 401 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 398 insertions(+), 4 deletions(-) -- 2.18.0
