On 22 October 2018 at 18:35, Edgar E. Iglesias <edgar.igles...@gmail.com> wrote: > From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> > > This patch series adds initial support for Xilinx's Versal SoC. > Xilinx is introducing Versal, an adaptive compute acceleration platform > (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar > Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with > leading-edge memory and interfacing technologies to deliver powerful > heterogeneous acceleration for any application. The Versal AI Core series has > five devices, offering 128 to 400 AI Engines. The series includes dual-core > Arm > Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time > processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines > optimized for high-precision floating point with low latency. > > More info can be found here: > https://www.xilinx.com/news/press/2018/xilinx-unveils-versal-the-first-in-a-new-category-of-platforms-delivering-rapid-innovation-with-software-programmability-and-scalable-ai-inference.html > > > In QEMU we'd like to have a virtual developer board with the Versal SoC > and a selected set of peripherals under the control of QEMU. > We'd like to gradually extend this board as QEMU gains more support > for Versal hardware components. QEMU will generate a device-tree > describing only the components it supports and includes in the virtual > dev board. > > Before adding Versal support, this series starts with a few fixes to the > GEM that I ran into when running recent kernels on the Versal and ZynqMP > models. > > I also noticed a problem with HVC insns not being enabled when using > QEMU's PSCI implementation on CPU's with EL2 and EL3 enabled. This causes > problems for Linux/KVM guests, also fixed in this series.
Applied patches 3 and 4 to target-arm.next (1 and 2 being already in master), thanks. -- PMM