On Fri, Dec 14, 2018 at 12:42:32 -0500, Emilio G. Cota wrote:
> +static void tlb_mmu_resize_locked(CPUArchState *env, int mmu_idx)
> +{
> + CPUTLBDesc *desc = &env->tlb_d[mmu_idx];
> + size_t old_size = tlb_n_entries(env, mmu_idx);
> + size_t rate;
> + size_t new_size = old_size;
(snip)
> + if (desc->n_used_entries > desc->window.max_entries) {
> + desc->window.max_entries = desc->n_used_entries;
> + }
> + rate = desc->window.max_entries * 100 / old_size;
> +
> + if (rate == 100) {
> + new_size = MIN(old_size << 2, 1 << CPU_TLB_DYN_MAX_BITS);
> + } else if (rate > 70) {
> + new_size = MIN(old_size << 1, 1 << CPU_TLB_DYN_MAX_BITS);
I won't resend a v6 until v5 gets any comments, but I just
want to point out that after doing some more benchmarking,
quadrupling the size here is unnecessary; in fact, perf is 1% better
on average if we just double the TLB size when rate > 70.
Emilio
