On 20/12/18 01:18, Robert Hoo wrote:
> On Wed, 2018-12-19 at 14:01 +0000, Daniel P. Berrangé wrote:
>> On Wed, Dec 19, 2018 at 09:44:40PM +0800, Robert Hoo wrote:
>>> Signed-off-by: Robert Hoo <robert...@linux.intel.com>
>>> ---
>>> target/i386/cpu.c | 3 +--
>>> 1 file changed, 1 insertion(+), 2 deletions(-)
>>>
>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>>> index 677a3bd..b6113d0 100644
>>> --- a/target/i386/cpu.c
>>> +++ b/target/i386/cpu.c
>>> @@ -2613,8 +2613,7 @@ static X86CPUDefinition builtin_x86_defs[] =
>>> {
>>> CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG
>>> |
>>> CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57,
>>> .features[FEAT_7_0_EDX] =
>>> - CPUID_7_0_EDX_PCONFIG | CPUID_7_0_EDX_SPEC_CTRL |
>>> - CPUID_7_0_EDX_SPEC_CTRL_SSBD,
>>> + CPUID_7_0_EDX_SPEC_CTRL |
>>> CPUID_7_0_EDX_SPEC_CTRL_SSBD,
>>> /* Missing: XSAVES (not supported by some Linux versions,
>>> * including v4.1 to v4.12).
>>> * KVM doesn't yet expose any XSAVES state save
>>> component,
>>
>> This was shipped in QEMU 3.1.0, so I don't think we can
>> unconditionally
>> remove it like this without breaking CPU model migration compat.
>>
> I think the sooner, the better. Take the time window that Icelake CPU
> model has just shipped with QEMU 3.1.0 and is not publicly/widely used
> yet.
We should still leave it in the 3.1 machine types. I've just sent a
patch to do the same with MPX.
Paolo
