On 1/15/19 10:58 AM, Alistair Francis wrote: > From: Michael Clark <m...@sifive.com> > > * Add riscv prefix to raise_exception function > * Add riscv prefix to CSR read/write functions > * Add riscv prefix to signal handler function > * Add riscv prefix to get fflags function > * Remove redundant declaration of riscv_cpu_init > and rename cpu_riscv_init to riscv_cpu_init > * rename riscv_set_mode to riscv_cpu_set_mode > > Cc: Sagar Karandikar <sag...@eecs.berkeley.edu> > Cc: Bastian Koppelmann <kbast...@mail.uni-paderborn.de> > Cc: Palmer Dabbelt <pal...@sifive.com> > Cc: Alistair Francis <alistair.fran...@wdc.com> > Signed-off-by: Michael Clark <m...@sifive.com> > Signed-off-by: Alistair Francis <alistair.fran...@wdc.com> > ---
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
