On 1/21/19 10:51 AM, Peter Maydell wrote: > The SSE-200 has a CPU_IDENTITY register block, which is a set of > read-only registers. As well as the usual PID/CID registers, there > is a single CPUID register which indicates whether the CPU is CPU 0 > or CPU 1. Implement a model of this register block. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > --- > hw/misc/Makefile.objs | 1 + > include/hw/misc/armsse-cpuid.h | 41 ++++++++++ > hw/misc/armsse-cpuid.c | 134 ++++++++++++++++++++++++++++++++ > MAINTAINERS | 2 + > default-configs/arm-softmmu.mak | 1 + > hw/misc/trace-events | 4 + > 6 files changed, 183 insertions(+) > create mode 100644 include/hw/misc/armsse-cpuid.h > create mode 100644 hw/misc/armsse-cpuid.c
Reviewed-by: Richard Henderson <richard.hender...@linaro.org> r~
