Load both elements signed and store them into the two 64 bit elements.
Signed-off-by: David Hildenbrand <da...@redhat.com>
---
target/s390x/insn-data.def | 2 ++
target/s390x/translate_vx.inc.c | 33 +++++++++++++++++++++++++++++++++
2 files changed, 35 insertions(+)
diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def
index a8d43b588c..ab3309c54b 100644
--- a/target/s390x/insn-data.def
+++ b/target/s390x/insn-data.def
@@ -1033,6 +1033,8 @@
E(0xe71a, VSCEG, VRV, V, la2, 0, 0, 0, vsce, 0, MO_64, IF_VEC)
/* VECTOR SELECT */
F(0xe78d, VSEL, VRR_e, V, 0, 0, 0, 0, vsel, 0, IF_VEC)
+/* VECTOR SIGN EXTEND TO DOUBLEWORD */
+ F(0xe75f, VSEG, VRR_a, V, 0, 0, 0, 0, vseg, 0, IF_VEC)
#ifndef CONFIG_USER_ONLY
/* COMPARE AND SWAP AND PURGE */
diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c
index d3463c9ef3..23cdae0970 100644
--- a/target/s390x/translate_vx.inc.c
+++ b/target/s390x/translate_vx.inc.c
@@ -731,3 +731,36 @@ static DisasJumpType op_vsel(DisasContext *s, DisasOps *o)
get_field(s->fields, v3), get_field(s->fields, v4), &gvec_op);
return DISAS_NEXT;
}
+
+static DisasJumpType op_vseg(DisasContext *s, DisasOps *o)
+{
+ const uint8_t es = get_field(s->fields, m3);
+ int idx1, idx2;
+ TCGv_i64 tmp;
+
+ switch (es) {
+ case MO_8:
+ idx1 = 7;
+ idx2 = 15;
+ break;
+ case MO_16:
+ idx1 = 3;
+ idx2 = 7;
+ break;
+ case MO_32:
+ idx1 = 1;
+ idx2 = 3;
+ break;
+ default:
+ gen_program_exception(s, PGM_SPECIFICATION);
+ return DISAS_NORETURN;
+ }
+
+ tmp = tcg_temp_new_i64();
+ read_vec_element_i64(tmp, get_field(s->fields, v2), idx1, es | MO_SIGN);
+ write_vec_element_i64(tmp, get_field(s->fields, v1), 0, MO_64);
+ read_vec_element_i64(tmp, get_field(s->fields, v2), idx2, es | MO_SIGN);
+ write_vec_element_i64(tmp, get_field(s->fields, v1), 1, MO_64);
+ tcg_temp_free_i64(tmp);
+ return DISAS_NEXT;
+}
--
2.17.2
